JPH1138045A - Digital oscilloscope - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To provide a digital oscilloscope having a constant processing speed even when a plurality of channels and a zoom function are used. SOLUTION: A memory 10 in which sampling data is stored, a data processing device 20 for performing data compression processing such as a PP compression function on the sampling data stored in the memory, A digital oscilloscope having a display memory 40 for storing data stored therein and a display control device 30 for reading data stored in the display memory and displaying the data on a CRT, the maximum value and the minimum value detected by the data processing device. A bitmap memory 50 for sequentially writing data linearly interpolated from the data for each raster, and the image data generated in the bitmap memory is written to a display memory by the data processing device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital oscilloscope for displaying time-series data, and more particularly to an improvement in a data transfer function in a display data generation circuit and a function of detecting a maximum value and a minimum value of data and linearly interpolating between them. .

[0002]

2. Description of the Related Art In a digital oscilloscope, for example, as disclosed in Japanese Patent Laid-Open No. 7-128371,
It has a PP compression function that detects the maximum value and the minimum value of the data and linearly interpolates between them. FIG. 6 is a configuration block diagram of a conventional device. In the figure, a memory 10 stores sampling data. Data processing device 2
0 performs a data compression process such as a PP compression function on the sampling data stored in the memory 10 and stores the compressed data in the display memory 40. The display control device 30 reads data stored in the display memory 40 and displays the data on a CRT.

The data compression performed by the data processing device 20 is because the display memory 40 is always read from the display control device 30, so that the data processing device 20 rarely writes the bitmap data to the display memory 40. It is because it has become. The display control device 30 generates bitmap data of the compressed data written in the display memory 40 and displays it on a CRT. In this way, the display necessary for the CRT is performed while compressing the data to be written to the display memory 40.

FIG. 7 is an explanatory diagram of a PP compression function.
(A) illustrates the interpolation for the monotonically increasing waveform, and (B) illustrates the interpolation for the uneven waveform. When the display is a raster scan type display such as a CRT, the data is subjected to PP compression for each data corresponding to one raster. In the figure, data X1 ~
The waveform portion of X8 is sampling data sent from the memory 10 and is also displayed in correspondence with the raster. The rectangular area on the right side of the waveform portion represents the content written to the display memory 40 in correspondence with the screen display.

In the monotonically increasing waveform, there are a minimum value X1 and a maximum value X4 in raster 1, and a minimum value X1 in raster 2
There are 5 and the maximum value X8. Here, since there are four data X per raster, the intermediate values X2, X3, X6,
X7 is used for reproducing the waveform, and a correction value X5-X4 exists as a correction between data between rasters 1 and 2. In the uneven waveform, a minimum value X3 and a maximum value X2 in raster 1 exist, and a minimum value X5 and a maximum value X6 in raster 2 exist. This is because the amount of correction between rasters is determined in consideration of the order of the maximum value and the minimum value in order to faithfully reproduce the waveform.

FIG. 8 is a flow chart when the PP compression function is realized by software. First, to perform initialization,
The data order i in one raster is set to zero, and the start address of the memory 10 is set in ADR (S2). Raster number j
Is set to zero, -infinity is set as the maximum value of the data in the raster j, and + infinity is set as the minimum value (S
4). +1 is added to the address of the memory 10 (S6),
The data X [ADR] at this address is read (S
8). Next, it is determined whether the read data X [ADR] exceeds the initial maximum value (S10). If it exceeds, the maximum value is updated to data X [ADR] (S12), the maximum value is stored in the address Y (2j + 1) where the maximum and minimum values in each raster are stored, and the minimum value is stored in the display memory 40. It is stored in the address Y (2j) (S14).

Next, it is determined whether the read data X [ADR] is smaller than the initial minimum value (S16). If it is lower, the minimum value is updated to data X [ADR] (S18),
The maximum value is stored in the address Y (2j) of the display memory 40, and the minimum value is stored in the address Y (2j + 1) of the display memory 40 (S20). Then, it moves to the next raster (S22),
If the raster has not reached the upper limit value M, the process returns to S6 (S6).
24). When the upper limit M of the rasters is reached, the next data order i + 1 in each raster is set (S26), and it is determined whether the upper limit N of the number of data in each raster has been reached (S2).
8). If it is in the middle, the process returns to S4, and if it reaches, the process ends.

FIG. 9 is a circuit diagram in the case where the PP compression function is constituted by logic elements, and is shown in units of one raster. The memory is connected to a multiplexer circuit MPX via a buffer circuit.
1, 2 and the comparators COMP 1, 2. The comparator COMP1 compares the contents of the maximum value register and the buffer circuit, and
A switching signal. The multiplexer circuit MPX1 maintains the contents of the maximum value register or updates the contents of the buffer with the contents of the buffer circuit. The comparator COMP2 compares the contents of the minimum value register with the contents of the buffer circuit, and sends a switching signal to the multiplexer circuit MPX2. The multiplexer circuit MPX2 maintains the contents of the minimum value register or updates the contents of the minimum value register with the contents of the buffer circuit. The order register is
The switching signals of the comparators COMP1 and COMP2 are input to record the contents of the maximum value register and the contents of the minimum value register.

[0009]

However, in the PP compression function of FIG. 7, although the data compression ratio is high, the data used for display is only the maximum value / minimum value for each raster and the order thereof. The amount of lost information is large. When a plurality of channels and a zoom function are used, the display control device 30
However, there is a problem in that the number of data to be passed to the memory increases and the processing speed decreases.

[0010] In addition, the algorithm shown in FIG.
When the compression function is realized, there is a problem that the processing speed is reduced because the comparison is performed twice for the one data, the minimum value and the maximum value. Therefore, when the PP compression function is realized by the circuit of FIG. 9, the comparison of the minimum value and the maximum value for one data is performed simultaneously, so that the processing speed is doubled. However, since there is a limit to the processing speed of the comparator, there is a problem that it is difficult to make the processing speed faster than a certain processing speed.

A first object of the present invention is to provide a digital oscilloscope having a constant processing speed even when a plurality of channels and a zoom function are used. A second object is to provide a digital oscilloscope that can increase the processing speed of PP compression.

[0012]

In order to achieve the first object, a digital oscilloscope according to claim 1 of the present invention has a memory 10 in which sampling data is stored and a memory 10 in which the sampling data is stored. For the sampling data, a data processing device 20 for performing data compression processing such as a PP compression function, a display memory 40 for storing data compressed by the data processing device, and reading data stored in the display memory. In a digital oscilloscope having a display control device 30 for displaying on a CRT, a bit map memory 50 for sequentially writing data linearly interpolated from the maximum value and the minimum value detected by the data processing device for each raster is provided. The image data generated in the map memory is written to the display memory by the data processing device. It is characterized in that writing.

According to the first aspect of the present invention, data linearly interpolated from the maximum value and the minimum value detected by the data processing device are sequentially written into the bit map memory 50 for each raster. Then, the image data generated in the bitmap memory is written in the display memory by the data processing device. Since the data amount of the image data is constant regardless of the data amount of the sampling data, the data amount written to the display memory by the data processing device is constant.

Here, the data amount of the image data is larger than the data amount of the sampling data.
Since the number of data to be transferred can be reduced, even if the amount of data to be transferred to the display memory by a plurality of channels or zooming increases, the processing speed can be kept from being reduced.

In order to achieve the second object, the digital oscilloscope according to the third aspect of the present invention comprises a memory 10 storing sampling data and a P-type memory for storing the sampling data. Data processing device 20 for performing data compression processing such as a P compression function
A display memory 40 for storing data compressed by the data processing device, and a display control device 3 for reading data stored in the display memory and displaying the data on a CRT.
In a digital oscilloscope having 0, the data processing device has a line buffer circuit 24 for storing image data for one raster, and a maximum value and a minimum value for image data for one raster stored in the line buffer circuit. Is preferably provided. Then, the maximum value of all data included in the line buffer circuit 24,
Since the minimum value is detected, the processing speed is remarkably increased.

According to a fourth aspect of the present invention, the data processing device includes a decoder 22 for classifying the value of the sampling data according to the resolution of the image data, and each sampling data is divided by the value divided by the decoder. Corresponding one
A line buffer circuit 24 for storing as raster image data may be used. Then, since the decoder arranges the data values in advance in ascending order according to the data values, the configuration of the circuit 26 for detecting the maximum value and the minimum value of the image data for one raster is simplified.

Further, the data processing device detects a maximum value and a minimum value of one raster image data stored in the line buffer circuit.
6 and a raster data storage unit 28 for storing the maximum value, the minimum value, and the last data in the immediately preceding raster. Then, since the last data in the immediately preceding raster is stored, it is not necessary to detect the order of the maximum value and the minimum value in the raster, and the configuration of the maximum value / minimum value detection circuit is simplified.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a configuration block diagram showing one embodiment of the present invention. In FIG. 1, components having the same functions as those in FIG. 6 are denoted by the same reference numerals, and description thereof will be omitted. In the figure, a data processing device 20 includes a decoder 22, a line buffer circuit 24, a maximum / minimum value detection circuit 26, and a raster data storage unit 28. The decoder 22 distributes the sampling data of one raster to each level and stores the data in the corresponding position of the line buffer circuit 24.
The line buffer circuits 24 have a number corresponding to the vertical resolution of the CRT. The maximum value / minimum value detection circuit 26 detects the maximum value and the minimum value of one raster data stored in the line buffer circuit 24. Raster data storage 2
Reference numeral 8 stores the maximum value and the minimum value of the raster and the last data of the immediately preceding raster.

The bit map memory 50 is for linearly interpolating the maximum value and the minimum value detected by the maximum value / minimum value detection circuit 26 and sequentially writing the data for each raster. In this linear interpolation, the last data in the immediately preceding raster may be used. The image data stored in the bitmap memory 50 is transferred to the display memory 40 via the data processing device 20 and the display control device 30. When there are a plurality of screens, the capacity of the bitmap memory 50 may be determined according to the number of screens.

FIG. 2 is a circuit diagram showing a specific configuration of the data processing device 20. Here, a case of 2 bits is shown. In the decoder 22, since the input sampling data is 2 bits, it is assigned to 0 to 3. The line buffer circuit 24 has four flip-flop circuits, and 0 to 3 are assigned to each flip-flop circuit. Then, the output signal of the decoder 22 is input to the logic circuits of the AND circuit and the OR circuit and stored in any of the flip-flop circuits 0 to 3. The maximum value / minimum value detection circuit 26 receives each output of the flip-flop circuit of the line buffer circuit 24 and distributes the output to a maximum value register and a minimum value register. Since the maximum value and the minimum value are detected by a single process for all data included in the line buffer circuit 24, the processing speed of the maximum value / minimum value detection circuit 26 is very high.

Next, the maximum value / minimum value detection circuit 26 will be described in detail. The OR circuit 261 receives the output signals of the flip-flop circuits 2 and 3 and sends them to the upper bits of the maximum value register. The AND circuit 262 inputs the NOT logic of the output of the OR circuit 261 and the output signal of the flip-flop circuit 1. The OR circuit 263 receives the output signals of the AND circuit 262 and the flip-flop circuit 3 and sends them to the lower bits of the maximum value register. The OR circuit 264 receives the output signals of the flip-flop circuits 0 and 1 and sends them to the upper bits of the minimum value register via the inverter 265. AND circuit 2
66 inputs the NOT logic of the output of the OR circuit 264 and the output signal of the flip-flop circuit 2. The OR circuit 267
The output signals of the AND circuit 266 and the flip-flop circuit 0 are input and sent to the lower bits of the maximum value register.

FIG. 3 is a block diagram of the line buffer circuit 24 when the decoder performs parallel processing. Since the data can be sorted by parallel processing in the decoder, a plurality of data can be processed simultaneously. As a result, FIG.
Thus, the processing can be performed at a higher speed as compared with the case where the data is sequentially distributed to the line buffer circuit 24 by using a single decoder 22 as shown in FIG.

FIG. 4 is a circuit diagram of a maximum / minimum value detection circuit 26 using a comparator, which is shown for comparison with FIG. When the maximum / minimum value detection circuit 26 is configured using a comparator, the number of stages of the comparator increases as the number of data increases, and the processing speed decreases.

FIG. 5 is an explanatory diagram of the PP compression function in the raster data storage unit 28, which is explained by interpolation of the uneven waveform used in FIG. 7B. The raster data storage unit 28 stores the last data in the immediately preceding raster, and also stores the maximum value and the minimum value in the raster. Therefore, as an example of raster 2, the last data X4 in raster 1 exists, and the minimum value X5 in raster 2 exists.
And the maximum value X6. Therefore, X4 to X6 are displayed as image data in raster 2, and FIG.
The waveform is reproduced more faithfully as compared with the interpolation of (B).

In the above embodiment, the first object that the processing speed is constant even when a plurality of channels and a zoom function are used, and the second object that can increase the processing speed of PP compression are simultaneously achieved. Although the embodiment has been described, the present invention is not limited to this, and it is sufficient to provide the bitmap memory 50 in the data processing device 20 to achieve the first object. Needless to say, it is only necessary to provide a line buffer circuit in the data processing device 20 in order to achieve the above.

[0026]

As described above, according to the first aspect of the present invention, the data linearly interpolated from the maximum value and the minimum value detected by the data processing device for each raster are stored in the bitmap memory 50. And the image data generated in the bit map memory is written to the display memory by the data processing device. Since the data amount of the image data is constant regardless of the data amount of the sampling data, the data amount written to the display memory by the data processing device is constant. Here, the data amount of the image data can be smaller than the data amount of the sampling data as described in claim 2, so that even if the data amount to be transferred to the display memory by a plurality of channels or zooming is increased. In addition, a reduction in processing speed can be reduced.

According to the third aspect of the present invention, the data processing apparatus has the line buffer circuit 24 for storing one raster image data, and the one raster image data stored in the line buffer circuit. Circuit 26 for detecting the maximum value and the minimum value of Then
Since the maximum value and the minimum value are detected for all data included in the line buffer circuit 24, the processing speed is remarkably increased.

According to a fourth aspect of the present invention, the data processing device includes a decoder 22 for classifying the value of the sampling data according to the resolution of the image data, and each sampling data based on the value classified by the decoder. Corresponding one
A line buffer circuit 24 for storing as raster image data may be used. Then, since the decoder arranges the data values in advance in ascending order according to the data values, the configuration of the circuit 26 for detecting the maximum value and the minimum value of the image data for one raster is simplified.

Further, in the data processing device, a circuit 2 for detecting a maximum value and a minimum value of one raster image data stored in the line buffer circuit is provided.
6 and a raster data storage unit 28 for storing the maximum value, the minimum value, and the last data in the immediately preceding raster. Then, since the last data in the immediately preceding raster is stored, it is not necessary to detect the order of the maximum value and the minimum value in the raster, and the configuration of the maximum value / minimum value detection circuit is simplified.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram showing one embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration of the data processing device 20.

FIG. 3 is a configuration diagram of a line buffer circuit 24 when a decoder performs parallel processing.

FIG. 4 is a circuit diagram of a maximum / minimum value detection circuit 26 using a comparator.

FIG. 5 is an explanatory diagram of a PP compression function in a raster data storage unit 28;

FIG. 6 is a configuration block diagram of a conventional device.

FIG. 7 is an explanatory diagram of a PP compression function.

FIG. 8 is a flowchart in a case where a PP compression function is realized by software.

FIG. 9 is a circuit diagram when a PP compression function is configured by a logic element.

[Explanation of symbols]

 Reference Signs List 10 memory 20 data processing device 30 display control circuit 40 display memory 50 bitmap memory

Claims (5)

[Claims] 1. A memory (10) in which sampling data is stored, and the sampling data stored in the memory are:
A data processing device (20) for performing a data compression process such as a PP compression function, a display memory (40) for storing data compressed by the data processing device, and a CRT for reading data stored in the display memory A digital oscilloscope having a display control device (30) for displaying the data in a bit map memory (50) for sequentially writing data linearly interpolated from the maximum value and the minimum value detected by the data processing device for each raster; A digital oscilloscope, wherein the image data stored in the bitmap memory is written into the display memory by the data processing device. 2. The digital oscilloscope according to claim 1, wherein a data amount of said image data is smaller than a data amount of said sampling data. 3. A memory (10) in which sampling data is stored; and a sampling data stored in the memory.
A data processing device (20) for performing a data compression process such as a PP compression function, a display memory (40) for storing data compressed by the data processing device, and a CRT for reading data stored in the display memory The data processing device has a line buffer circuit (24) for storing image data for one raster, and a display control device (30) for displaying image data for one raster. A digital oscilloscope having a circuit (26) for detecting a maximum value and a minimum value of raster image data. 4. A data processing device comprising: a decoder for classifying a value of the sampling data in accordance with a resolution of image data; and one raster corresponding to each sampling data by a value classified by the decoder. The digital oscilloscope according to claim 3, further comprising a line buffer circuit (24) for storing minute image data. 5. A data processing apparatus comprising: a circuit for detecting a maximum value and a minimum value of one raster image data stored in the line buffer circuit; 4. The digital oscilloscope according to claim 3, further comprising a raster data storage unit (28) for storing the last data in (1).