JPH1138942A - Liquid crystal driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To impress no excessive input on a multiplexer, which mixes inversion video signals and non-inversion video signals in a time-shared manner. SOLUTION: This driver circuit is provided with an amplifier 23, which outputs inversion video signals and non-inversion video signals, a multiplexer 24, a clip level generating circuit, which generates a first and a second clip level in accordance with a control signal, a first clip circuit 28, which clips an inversion video signal and a non-inversion video signal in accordance with the first clip level of this clip level generating circuit and a second clip level circuit 30, which clips inversion video signals and non-inversion video signals in accordance with the second clip level of the clip level generating circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving circuit for driving a liquid crystal panel by applying a video signal thereto, and more particularly to selectively multiplexing an inverted video signal and a non-inverted video signal every one horizontal cycle (multiplex). ).

[0002]

2. Description of the Related Art As shown in FIG.
An inverted signal is generated by a low-voltage power supply system (about 5 V), converted into an AC signal by the multiplexer 24, and then converted to a high-voltage power supply (12 V).
) To amplify and output to a desired signal level for driving the LCD panel 26. This is due to power consumption considerations, but generally these liquid crystal drive circuits
In some cases, it is difficult to configure a high-performance multiplexer and high-performance multiplexer that is a bipolar analog IC.

A video signal is decoded to an input terminal 21 shown in FIG. 2, and any one of R, G, and B of three primary color video signals is input. Reference numeral 22 denotes a bias circuit for adjusting the brightness by changing the potential of the output DC of the differential output amplifier 23 by generally changing the potential. Reference numeral 24 denotes a multiplexer, which generates an AC signal of c by selecting an inverted output a and a non-inverted output b of the differential output amplifier 23 by an inverted control signal input to the control terminal 20. This is shown in FIG. In the period T1 of FIG. 3, a non-inverted signal is selected, and in the period T2, an inverted signal is selected.

The AC signal c is amplified by the amplifier 25 to a signal level necessary for driving the liquid crystal panel, and is input to the liquid crystal panel. In general, from the viewpoint of power consumption, a low power supply VCC1 (about 5 V) and a high power supply
The circuit block can be divided into (about 12 V) power supplies. Therefore, if the circuits of FIG. 2 are prepared for RGB, the liquid crystal panel can be appropriately driven.

[0005]

However, in FIG. 2, since a voltage close to 12 V is applied between the input terminals of the differential amplifier constituting the multiplexer 24, the multiplexer 24 may be destroyed. Multiplexer 2
No. 4 combines two voltage followers, turning on one turns off the other and turning off one turns on the other.

FIG. 4 shows a circuit example of a multiplexer. In this circuit example, when the inverted b and non-inverted a video signals shown in FIG. At this time, the terminal 20A is at the “L” level,
"H" level is applied to the terminal 20B. Then, the transistor 100 is turned on and the transistor 101 is turned off.
Then, the transistors 31 and 32 are turned on, and a signal equal to the non-inverted video signal a is generated at the terminal 102. A minimum voltage of 1 V is applied to the bases of the transistors 32 and 33, and at this time, a voltage of 11 V is applied to the base of the transistor. Therefore, at this time, the transistor 3
3 has an emitter potential of about 11V and a base potential of 1V. Similarly, in the period T2, a voltage of up to 11 V is applied to the bases of the transistors 32 and 33, and the base potential of the transistor 31 is 1 V at this time, so a voltage of about 10 V is applied between the emitter and the base of the transistor 31. Generally, the Vbe reverse withstand voltage of the transistor is about 5 V to 8 V, so that the multiplexer having this circuit configuration has a problem that the signal of the level for driving the liquid crystal panel cannot be directly switched unless some means is taken.

On the other hand, a liquid crystal panel has conventionally been generally disclosed in
A black level limiter as shown in 5-61430 is required. Further, if a signal that greatly exceeds the central potential of the AC drive signal is applied to the liquid crystal panel in the white level direction, there is a disadvantage that the display is inverted beyond white and displayed in reverse. In particular, in general, the image signal processing circuit raises about 2 MHz in order to improve the sharpness of the picture, so that the peak of the edge portion rises and the above-described phenomenon may occur, so that a white-side limiter is often required.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned points, and has been made in consideration of the above-mentioned problems. The present invention relates to an active matrix type liquid crystal panel which converts a video signal into an AC signal whose polarity is inverted with respect to a counter electrode of a liquid crystal. An amplifier for outputting an inverted video signal and a non-inverted video signal in a liquid crystal driving circuit to be applied; a multiplexer for mixing the inverted video signal and the non-inverted video signal in a time-division manner according to a control signal; And a clip level generating circuit for generating first and second clip levels according to the first and second clip levels, and a first clipping circuit for clipping the inverted video signal and the non-inverted video signal according to the first clip level of the clip level generating circuit. A clip circuit for clipping the inverted video signal and the non-inverted video signal according to the second clip level of the clip level generating circuit Second and a clipping circuit that is characterized by determining based on the first and second clip level to a maximum input applied to the multiplexer and black and white level of the video signal.

[0009]

FIG. 1 shows a liquid crystal driving circuit according to the present invention, in which reference numeral 14 denotes a first buffer for outputting one output signal a of a differential output amplifier 23, and reference numeral 15 denotes a differential output amplifier 2.
3, a second buffer for outputting the other output signal b; 28, a first clip circuit for clipping an inverted video signal and a non-inverted video signal in accordance with a clip level from a control terminal 29; A second clip circuit that clips an inverted video signal and a non-inverted video signal according to a level. The first clip circuit 28 includes NPN transistors 18 and 19 and resistors 16 and 17. The second clip circuit 30 includes PNP transistors 20 and 27 and a resistor 1
6,17.

The clip levels generated at the control terminals 29 and 31 are created by the circuit shown in FIG. First, the limiter level creation circuit shown in FIG. 5 will be described. Terminal 22
When the inversion control signal applied to the differential power supply is lower than the voltage of the reference power supply 23, the differential pair composed of the PNP transistors 13 and 14 turns on the transistor 14 and turns on the current mirror circuit (transistor 9, resistor 10, transistor 15, and resistor 15). 16), the current I substantially equal to that of the current source 12 flows through the resistor 8 and the voltage drop causes the base potential of the transistor 2 to become Vref−
R · I. At this time, in the differential pair constituted by the NPN transistors 19 and 20, no current flows through the current mirror circuit (the resistor 5, the transistor 6, the transistor 18, and the resistor 17) because the transistor 19 is turned off. The base potential becomes Vref.

When the inverted control signal applied to the terminal 22 is higher than the voltage of the reference power supply 23, the transistor 19
A current I substantially equal to the current source 21 flows through the resistor 7 due to the N current mirror circuit, and the base potential of the transistor 3 becomes Vref + RI. Therefore, the waveforms of the terminals 120 and 121 are the waveforms indicated by broken lines in FIGS. (The solid line is the waveform of the base of the transistors 2 and 3, which is the actual limiter level.) Next, the operation of the limiter in FIG. 1 will be described. First,
The output of the first buffer 14 is a non-inverted video signal indicated by a broken line in FIG. When this signal is selected by the multiplexer 24 (period T1), the clipping level of the transistor 18 is Vref-R ・ I, so that the clipping is not performed below this potential. That is, the transistor 18 functions as a black level limiter for the non-inverted signal. At this time, since the clip level of the transistor 20 is Vref at the same time, the clip is performed without exceeding this potential. That is, the transistor 20 functions as a white level limiter for the non-inverted signal.

At this time, the transistor 27 also operates. Since the clip level is Vref, the inverted signal is clipped without increasing the potential above this potential. This is shown in FIG. 6b. For this reason, (Vref-RI) is applied to the two input terminals of the differential amplifier constituting the multiplexer 24.
Only the signal of the level of -Vref = -RI is applied.
Thus, by adjusting the value of -RI, it is possible to prevent the application of a voltage of 5 V or more.

Next, when the inverted signal b is selected by the multiplexer 24, the clip level of the transistor 18 becomes Vref, and a non-inverted signal of Vref or less is not input to the multiplexer 24. Similarly, the output of the second buffer 15 is an inverted video signal indicated by a broken line in a period T2 in FIG. 6B. When this signal is selected by the multiplexer 24, the clip level by the transistor 27 becomes Vref +
Since it is RI, it is clipped without exceeding this potential. That is, the transistor 27 functions as a black level limiter for the inverted signal. At this time, at the same time, the clip level of the transistor 19 becomes Vref, and the clip is not made lower than Vref. That is, the transistor 19 functions as a white level limiter. When the inverted signal is selected, the clip level of the transistor 18 becomes Vre.
f and a non-inverted signal equal to or lower than Vref
Will not be entered.

Therefore, even if the multiplexer 24 has a circuit configuration as shown in FIG. 4, a signal (level shown in FIG. 4) necessary for driving the liquid crystal panel is usually used as the transistor 31 shown in FIG. No voltage of 5 V or more is applied between the base and the emitter of No. 34. Multiplexer 24
Is amplified by the amplifier 122 and output with the waveform of FIG. 6C.

Further, by equalizing the currents of the constant current sources 12 and 21 and the values of the resistors 7 and 8 in FIG.
Clip level can be set symmetrically with respect to
With respect to the above voltage, temperature compensation can be performed by the NPN transistor 3 and the PNP transistors 20 and 27 and the PNP transistor 2 and the NPN transistors 18 and 19, so that a clip circuit having less variation and temperature characteristics can be realized.

With the configuration shown in FIG. 1, the function of limiting the white and black levels and the function of preventing excessive input to the multiplexer 24 can be achieved simultaneously. For example, if the non-inverted signal is selected by the multiplexer 24, the non-inverted signal is subjected to white and black level limiters by the transistors 18 and 20. At the same time, the inverted signal is limited by the clipping operation of the transistor 27 so as not to exceed Vref. Therefore, the signal applied to the multiplexer 24 is I
It does not expand to levels above R.

[0017]

As described above, according to the present invention, an excessive input is not applied to a multiplexer for mixing an inverted video signal and a non-inverted video signal in a time-division manner. Further, according to the present invention, it is possible to perform a white and black level limiter function. Further, according to the present invention, the function of limiting the white and black levels and the function of preventing excessive input to the multiplexer 24 can be simultaneously achieved using the first clip circuit and the second clip circuit. Further, according to the present invention, since the inverted video signal and the non-inverted video signal are limited by the high power supply voltage circuit, the influence of the error of the limit amount is less likely to be affected as compared with the case of limiting by the low power supply voltage circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a liquid crystal drive circuit of the present invention.

FIG. 2 is a block diagram showing a conventional liquid crystal drive circuit.

FIG. 3 is a waveform chart for explaining the operation of a conventional liquid crystal drive circuit.

FIG. 4 is a circuit diagram for explaining the operation of the liquid crystal drive circuit of the present invention.

FIG. 5 is a circuit diagram of a clip level generating circuit of the liquid crystal driving circuit of the present invention.

FIG. 6 is a waveform chart for explaining the operation of the liquid crystal drive circuit of the present invention.

[Explanation of symbols]

 (23) Differential output amplifier (24) Multiplexer (26) Liquid crystal panel (28) First clip circuit (30) Second clip circuit

Claims (2)

[Claims] A liquid crystal drive circuit for applying a video signal to an active matrix type liquid crystal panel as an AC signal having a polarity inverted with respect to a counter electrode of a liquid crystal, and outputs an inverted video signal and a non-inverted video signal. An amplifier; a multiplexer that time-divisionally mixes the inverted video signal and the non-inverted video signal according to a control signal; and a clip level generation circuit that generates first and second clip levels according to the control signal. A first clipping circuit that clips the inverted video signal and the non-inverted video signal according to the first clip level of the clip level generating circuit; and a second clip level of the clip level generating circuit according to the second clip level. A second clip circuit for clipping the inverted video signal and the non-inverted video signal. Liquid crystal drive circuit, characterized in that determined on the basis of VConnect the maximum input applied to the multiplexer and black and white level of the video signal. 2. The first and second clipping circuits act as black and white level limiters for a video signal selected by the multiplexer, and operate on a video signal not selected by the multiplexer. Act as an input limiter for a multiplexer.
Liquid crystal drive circuit as described.