JPH1185155A - Mixing device and integrated circuit for musical instrument - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the circuit scale over the entire part of a mixer to a small scale, to facilitate extension and to enable the easy handling of external input. SOLUTION: A time slot converter 211 converts 64 pieces of the time slots allocated to the respective musical tone signals of 64 channels formed in time sharing to 96 pieces of time slots. A selector 212 allocates the remaining 32 pieces of the converted time slots relating to the musical tone signals for total 32 channels supplied via a DSP(digital signal processor) output port 213 or external input port 214 to the respective signals. Accumulators 2101 to 2104 output the musical tone signals allocated to the respective slots to the arbitrary output channels according to assignment information and accumulate the signals in one sampling period for each of the respective output channels.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mixing apparatus and a musical instrument integrated circuit suitable for applying effects to, for example, a plurality of channels of tone signals generated by time division multiplexing.

[0002]

2. Description of the Related Art In recent years, a digital signal processor (DSP) which executes various control programs to perform various numerical processings on an input digital signal has been developed with the progress of semiconductor manufacturing technology. As they become available, they are being used in various fields. For example, DSPs are used in electronic musical instruments. The DSP in this case is used as an aggregate of effect blocks for adding a sound effect to a musical tone, and these effect blocks are variously combined to form a DSP.
Different sound effects are added to musical sounds in parallel.

Generally, in an electronic musical instrument, a tone generator for generating a tone signal operates in a time-division multiplex manner to simultaneously generate tone signals for a plurality of channels. The configuration was as follows. That is, the tone generator circuit accumulates tone signals of (a part of) a plurality of channels for each sampling period (period) and supplies the accumulated result to the DSP, while the DSP executes a predetermined effect algorithm. In this case, a predetermined acoustic effect is added in parallel to the accumulation result in the tone generator circuit, and these are accumulated for each sampling period. Then, the signal accumulated in the DSP is converted into an analog signal by a D / A converter, and sound is generated.

[0004]

As described above, in the conventional configuration, each of the tone generator circuit and the DSP requires a mixing circuit for accumulating the tone signal of each channel for each sampling period. Each mixing circuit is composed of a multiplier and an accumulator, and has a problem that the circuit scale becomes large. Here, it should be noted that even if an attempt is made to share the accumulator in the tone generator circuit and the DSP, it cannot be easily shared because the tone generator circuit operates in time division multiplexing. By the way, when an effect is provided by a DSP, the computational power of the DSP is limited. Therefore, if only one DSP is used, the degree of the effect to be provided is naturally limited. In that case, it would be better to mount a DSP with high computing power or multiple DSPs on the electronic musical instrument, but such high-spec electronic musical instruments are not intended for general users, and the cost of electronic musical instruments is low. Is also expensive. Therefore, it is necessary to implement a DSP with sufficient capability for general users, and to add a DSP so that users who pursue high specifications can be satisfied, and to secure expandability in advance. Conceivable. But DSP
Is added, the output of the sound source circuit and the existing D
Since the input and output of the SP must be considered, simply D
It should also be noted that SPs cannot be added. further,
In recent years, there has been a demand for applying the same effect to an external input other than the tone generator circuit, for example, a tone signal generated by another electronic musical instrument, a microphone input, and the like. However, it should be noted that it is not easy to treat these external inputs in the same way as the outputs of the tone generator circuit operating in time division multiplexing. The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a mixing device capable of suppressing the entire circuit scale, easily expanding, and easily handling external inputs. It is an object to provide an integrated circuit for a device and a musical instrument.

[0005]

According to the present invention, in order to solve the above-mentioned problems, a first tone signal for n (n is an integer) number of time slots, which is generated independently of each other in n channels, is input. , And converts n time slots in the input tone signal into m (m is an integer satisfying m> n) time slots, and converts the tone signal into m time slots out of the m time slots. Conversion means for allocating the maximum number (m) of the tone signals, second input means for inputting the tone signal of the maximum (mn) channel, and the tone signal of the maximum (mn) channel input by the second input means. , The m
Allocating means for allocating the remaining (mn) of the time slots, and inputting the tone signal allocated to each time slot to perform m-channel time-division mixing processing to mix a plurality of output channels. Mixing means for generating a signal.

(Operation) According to the present invention, the converting means shortens n time slots in the n-channel tone signal input by the first input means to m time slots which are larger than the number. Allocating means allocates the tone signal input by the second input means to the slot in the gap generated by the conversion, and the output means converts the tone signal assigned to each slot into data indicating the output destination. , And accumulates for one sampling period for each output channel. Therefore, since the tone signal input by the first and second input means is accumulated in each output channel, the accumulation means is shared, which can contribute to the simplification of the whole configuration. According to the present invention, the first
The tone signal input by the input means and the tone signal input by the second input means are processed equally.
Furthermore, the output channels are comparable. Therefore, it becomes possible for the operator to make the setting of the mixing easy to understand. Further, since the input / output channels are equivalent, scalability is easy, and other external inputs can be easily handled. Further, according to the present invention, since the tone signal is calculated in stereo units, the handling is simplified for both the user and the device. In addition, according to the present invention, since overflow is detected for each output channel,
It is possible to prevent distortion due to overflow of digits.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

<1: Overall Configuration> First, an electronic musical instrument incorporating a mixer according to the present embodiment will be described. FIG.
FIG. 2 is a block diagram showing the overall configuration of the electronic musical instrument.
In this figure, reference numeral 10 denotes a CPU, which controls each unit via a bus B. The bus B is a general term for a control bus, a data bus, and an address bus. Reference numeral 11 denotes a ROM, which stores a basic program used in the CPU 10 and various data. Reference numeral 12 denotes a RAM, which temporarily stores various data generated under the control of the CPU 10. Reference numeral 13 denotes a panel switch, which includes switches for selecting a tone color of a musical tone to be generated, setting various states, and the like. The information set by the panel switch 13 is supplied to the CPU 10 via the bus B. Reference numeral 14 denotes a display unit, which is a CRT.
And a liquid crystal display panel.
The information input by 3 and the information set at the present time are displayed under the control of the CPU 10. In particular, the display unit 14 displays an output channel in which an overflow has occurred in the mixer, as described later.

Reference numeral 15 denotes a keyboard composed of 88 keys. Each of these keys is provided with a key sensor (not shown), which detects a player's operation on the keyboard 15 and detects a key code KC indicating the pitch of the pressed key,
Key information such as key-on KON / key-off KOFF for instructing generation / mute of a musical tone in response to key-depression / key-release and key-touch KT corresponding to the key-depression speed is transmitted to the CPU 10 via the bus B
To supply. Reference numeral 16 denotes an external storage device, FDD
(Floppy disk drive unit), HD
D (hard disk drive unit) and the like are used for recording various data.

Reference numeral 200 denotes a tone generator circuit, which constructs 64 channels for sound generation in a time-division manner, generates a tone signal in each channel, and constructs a predetermined effect algorithm. Is given. For this reason, the tone generator circuit 200 incorporates a DSP (digital signal processor) for applying an effect, in addition to a circuit for generating a musical tone signal as described later. Reference numeral 250 denotes a waveform memory which stores a plurality of basic waveform data for each timbre. Reference numeral 260 denotes an external circuit, and the sound source circuit 2
A unit other than 00 supplies a tone signal or a unit such as an effector connected to the outside. Details will be described later. Reference numeral 270 denotes a delay memory, which is used in a built-in DSP. And the sound source circuit 200
Is converted into an analog signal by a DA converter 17 and then is externally generated by a sound system (SS) 18 including an amplifier, a speaker, and the like.

<1-1: Sound Source Circuit> Next, the sound source circuit 20
0 will be described with reference to FIG. As shown in this figure, the control register 201
Each part is controlled by U10. Readout circuit 20
Numeral 2 is for reading out the waveform data of the designated timbre from the waveform data stored in the waveform memory 250 by manipulating the address so as to have the pitch designated by the key code KC. The volume change control circuit 203 includes the read circuit 2
02 with the key touch KT
The amplitude value is controlled so as to have the sound volume indicated by, and the sound source output before the effect is applied. The reading circuit 202 and the volume change control circuit 203
By operating on four channels, it is possible to generate different tone signals in each channel. CPU10
When a tone generation instruction such as a key press is generated, tone generation data is assigned to one of the 64 channels, and tone control data for controlling generation of a tone according to the tone generation instruction is assigned to a channel area allocated by the control register 201. Write. The read circuit 202 and the volume change control circuit 203 generate a corresponding tone based on the written tone control data. The volume control circuit 203 outputs the generated musical tones of the respective channels to the mixer 210 in a state of being time-divided into 64 channels for each sampling period.

The mixer 210 receives a tone signal from the volume change control circuit 203, a tone signal from the internal DSP 205 and the external circuit 260, performs predetermined processing, and outputs the processed signal to the internal DSP 205 and the external circuit 260. Things. Further, the mixer 210 returns a signal of an arbitrary output channel of the output to the DSP to the readout circuit 202 through a line. The read circuit 202 can write the returned signal in the RAM area of the waveform memory as new waveform data. The details of the mixer 210 will be described later. Note that in FIGS. 2 and 3, the reference numeral given to each signal line is the number of channels of a signal transmitted by the channel. Here, the internal DSP 205
Is for giving an effect to the tone signal as described above. The tone signal for four channels, which is a part of this output, is supplied to the DA converter 17 in FIG. The final output. The reason why the output of the electronic musical instrument is the output of the internal DSP 205 is as follows.
This is because the last stage of the output in the electronic musical instrument is an equalizer.
This is because it is one of the effect blocks constructed in Step 5.

<1-2: Mixer> Next, the mixer 210 will be described in detail. For the sake of convenience, before the configuration of the mixer 210 is described, the processing executed by the mixer 210 will be described.

<1-2-1: Internal Processing of Mixer> As shown in FIG. 5, the mixer 210 has 64 channels based on the sound source output, 16 channels from the internal DSP 205, and 16 channels from the external circuit 260. After inputting a total of 96 channels of tone signals and performing multiplication processing defined by settings # 1 to # 96 on the tone signals of each channel, the internal DSP is processed according to the assignment process determined by the settings.
A total of 32 channels including 16 channels to 205 and 16 channels to the external circuit 260 are arbitrarily assigned and output. The settings # 1 to # 96 are written into the control register 201 by the CPU 10. The settings # 1 to # 64 correspond to the sound channels 1ch to 64ch of the sound source, respectively. The settings # 65 to # 80 are transmitted from the DSP 205 to the mixer 2
These correspond to 1ch to 16ch of output to 10 respectively. Settings # 81 to # 96 correspond to external input channels 1 to 16c.
h. The processing determined by each setting # will be described later. Note that the setting # in the multiplier 215
The coefficient multiplication processes corresponding to 1 to # 96 are not performed in the order of #. As can be seen in FIG. 8, # 1 → # 2 → # 6
5 → # 3 → # 4 → # 66 → # 5 → ... → # 34 → # 81 →
The processing is performed in the order of # 35 → # 36 → # 82 → # 37 →. Of the input / output channels of the internal DSP 205 and the external circuit 260, the odd-numbered channel is set to the stereo L signal, and the odd-order even-numbered channel is set to the stereo R signal. Therefore, in other words, the input and output of the internal DSP 205 and the external circuit 260 can be said to be eight stereo channels (CH) each.

For convenience of description, the input / output channels are
When shown in monaural, it is written in lowercase as “ch”, and when shown in stereo, it is written in uppercase as “CH”. Therefore, one channel for stereo input / output is composed of two channels. Here, when the input / output channel is indicated as “CH” in stereo, the stereo channels supplied from the internal DSP 205 are input to the input channels CH1 to C
H8, and the stereo channels input from the external circuit 260 are input CH9 to CH16. Similarly, stereo channels input to the internal DSP 205 are referred to as outputs CH1 to CH8 when viewed from the mixer 210, and stereo channels output to the external circuit 260 are output CH9 to CH8.
Notated as 16. In addition, since the sound source output has not been subjected to the panning process yet, the monaural channels 1 to
ch64 (sounding channels 1 to 64).

<1-2-2: Setting # (i)> Next, the processing defined by the settings # 1 to # 96 will be described with reference to FIG. This processing is executed for each of the 96 input channels. The processing contents for an arbitrary input channel i (where i is an integer of 1 to 96) are set in a setting # (i) shown in FIG. )). The information of the settings # 1 to # 64 is set according to the timbre of the musical tone to be sounded in each sounding channel. That is, it is set as a part of the tone control data of each sounding channel # (i)
Information is included. For example, when a piano tone and a guitar tone are selected, and each tone is played separately at the same time, tone color control data corresponding to the tone to be generated in that channel is set in each sounding channel. That is, different setting # (i) is set according to the tone color of the musical tone assigned to the channel. On the other hand, setting # 65
Information # 96 is set individually for each effect executed by the DSP 205 or for each connected external circuit 260 in accordance with the operation of the panel switch 13. The information of the setting # (i) is, first, the stereo L, R
Pan information L and R indicating the weight of the signal, secondly, level information S1 to S4 for determining the send level for the L and R signals, and thirdly, these pan information L and R and level information S1 to S1 How to assign (assign) the multiplication result determined by S4 to each output channel
It is composed of assignment information A1 to A16 that determine whether or not the above is true. The assignment information A1 to A16 correspond to the stereo output channels CH1 to CH16, respectively.

Here, an equivalent circuit of the mixer 210 will be described with reference to FIG. In the circuit shown in this figure,
As for one input channel, the tone signal is weighted to the stereo L and R signals according to the pan information L and R, then multiplied by the level information S1 to S4, respectively, and the tone signal is multiplied by nothing. Without multiplying the coefficients, a stereo signal for a total of five channels, which is divided into L and R signals as they are, can be obtained. Then, one of the stereo signals for the five channels is output channel C.
Each of H1 to CH16 is selectively selected based on assignment information described later. Similar processing is performed on the input 96-channel tone signal.

At this time, if the coefficients of the pan information L and R and the level information S1 to S4 are expressed in dB (decibels), eight multiplication coefficients M1 to be multiplied by the tone signal of the input channel are used.
6 to M8 can be represented by a combination of adding pan information L and R and level information S1 to S4, as shown in FIG. 6B. Here, when the tone signals of the input channels are multiplied by the multiplication coefficients M1 to M8 shown in FIG.
Multiplication results can be equivalently obtained.

Next, among the information of the setting # (i), the assignment information A1 to A16 will be described. Assignment information A
1 to A16 are stereo output channels CH1 to CH1, respectively.
This is set in correspondence with CH16, and assigns, to the stereo output channel CH, a 3-bit non-multiplied coefficient and an 8-multiplied coefficient. In detail, any stereo output channel j
The contents of the assignment information A (j) for (where j is an integer of 1 to 16) are as shown in FIG. With reference to this figure, for example, when the assignment information A (10) of the setting # (79) is “101”, a signal obtained by multiplying the tone signal of the input channel 79 by the multiplication coefficient M3 is set to L of the stereo output CH10. Further, it can be seen that the product of the multiplication coefficient M4 is assigned to R of the stereo output CH10. That is, the multiplication coefficient M is added to the tone signal of L (the internal DSP 205 output ch15) of the stereo input CH8.
3 is the external output ch3 to the external circuit 260.
Multiplied by a multiplication coefficient M4 is the external circuit 260
Respectively assigned to the external output ch4.

<1-2-3: Structure of Mixer> Next, the internal structure of the mixer for executing the above-described internal processing will be described with reference to FIG. 8, a time-slot converter 211 receives a time-divisional 64-channel output shown in the sound source channel time slot of FIG. 8, and the time slot converter 211 sets a time slot width corresponding to each of the 64 sound source outputs to 2 times. / 3. Therefore, in one sampling period, 1.5 times 96
The number of time slots is secured. Selector 212
Represents the sound source output 6 in the converted 96 time slots.
4 channels, 16 channels from the internal DSP 205 supplied via the DSP output port 213, and 16 channels from the external circuit 260 supplied via the interface 204 and the external input port 214, respectively, for a total of 96 channels. The channel ch is selected so as to be allocated.

Here, the external circuit 260 may be input means for inputting a tone signal generated by another sound source, or input / output means for applying an effect to the tone signal. . In the present embodiment, the former means is assumed to be an AD converter 261 for inputting an analog signal such as a microphone input, and the FM sound source circuit 263 as another sound source, and the latter means is a sounding mechanism of a natural musical instrument. An electrical model that simulates a natural instrument is operated to thereby synthesize a musical tone of a natural musical instrument, and an external DSP 264 for applying an effect by means other than the internal DSP 205 is assumed. The physical model sound source 262 includes, for example, a closed-loop connection of a nonlinear element simulating the elastic characteristics of a string and a delay circuit corresponding to the vibration period of the string when synthesizing a musical tone by a stringed instrument such as a guitar. Is done. A tone signal generated using one of the 64 sounding channels is input to this closed loop as a kind of excitation signal (output from the mixer 210 to the closed loop circuit), and a signal circulating through the closed loop is output (mixer By extracting the input as input from the viewpoint of 210, an effect imitating the physical characteristics of the guitar is given. In this case, the waveform memory 250 stores in advance excitation waveform data obtained by recording a guitar picking pulse, and the sounding channel generates the sounding signal by reading out the excitation waveform data. The internal signal in the mixer 210 is a parallel signal of a plurality of bits, and the internal signal in the external circuit 260 is a serial signal. Therefore, the interface 204 has a function of converting the signal from the mixer 210 to the external circuit 260 from parallel to serial, and conversely, the function of the external circuit 26.
A function of converting a signal from 0 to the mixer 210 from serial to parallel is provided. Thus, the number of terminals of the tone generator circuit 200 (see FIG. 2) formed of a one-chip integrated circuit is reduced. Note that the external circuit 260 is the sound source circuit 200
May be mounted on a main board on which the circuit board is mounted, or may be connected to a connector provided on the main board. Thus, the number of the external circuits 260 can be changed, and the functions can be diversified. For example, when the external circuit 260 is mounted on the main board, the grade of the electronic musical instrument can be changed according to the number of the external circuits 260. In other words, by preparing a main board in which the number of external circuits 260 is three or more for high-end machines, the number of external circuits 260 is one or two for middle-class machines, and the external circuit 260 is omitted for low-end machines. It is possible to provide an electronic musical instrument according to the purpose and the cost. Further, if the external circuit 260 is configured to be connected to the connector provided on the main board, a plurality of boards having the external circuits 260 having different functions are prepared, and each board is selected and connected as needed, Electronic musical instruments can be upgraded.

Now, the multiplier 215 outputs 1 after the conversion.
Multiplied by the multiplication coefficient M determined by the setting # (n) at each timing when the time slots are further divided into eight.
1 to M8 in the time slot, respectively.
The tone signal of the channel (n) output from 12 is multiplied. The latch circuit 216 latches a tone signal not multiplied by the tone signal of the channel.
The latch circuit group 217 latches eight multiplication results. Next, the accumulators 2101 to 2104 output L and R of the outputs CH1 to CH8 and the outputs CH8 to CH, respectively.
This corresponds to 16 L and R. In other words, the accumulator 2101 supplies the internal DS to the internal DSP 205.
P input channels 1, 3, 5, 7, 9, 11, 13, and 15 correspond to odd channel channels, and the accumulator 2102 has an internal DS
Internal DSP input ch2, 4, 6, supplied to P205
The accumulator 2103 corresponds to the even-numbered channel ch of 8, 10, 12, 14, 16 and the odd-numbered channel ch of the external output ch1, 3, 5, 7, 9, 11, 13, 15 supplied to the external circuit 260. , The accumulator 2104 is connected to the external circuit 2
External output channels 2, 4, 6, 8, 10, 1
2, 14, and 16 correspond to even-numbered channels ch. The accumulators 2101 to 2104 perform processing for different output CHs of the same channel in each time slot in parallel with each other.

<1-2-4: Configuration of Accumulator in Mixer> The configuration of the accumulators 2101 to 2104 will be described with reference to FIG.
In the latch circuit 216 and the latch circuit group 217, as described above, one time slot is not multiplied by its tone signal, and the multiplication coefficient M1
A total of nine calculation results are latched for the products multiplied by .about.M8. The selector 2111 includes the multiplier 2
The multiplication results determined by the assignment information A1 to A8 of the setting # (n) are sequentially selected at the same timing as the multiplication timing by No. 15, that is, at the timing when one time slot is divided into eight. The selection result is supplied to one input terminal of the adder 2112. The shift register 2113 sequentially shifts the addition result by the adder 2112 at the selection timing of the selector 2111. The number of shift stages is determined by the output channel CH.
L of 1 to CH8 (ch1, 3, 5, 7, 9, 11, 1
There are eight stages corresponding to (3, 15). The addition result output from the shift register 2113 at each timing is:
The signal is supplied to the other input terminal of the adder 2112 via the gate circuit 2114.

Here, the gate circuit 2114 outputs the addition result corresponding to the immediately preceding sampling period to the adder 2112.
To prevent it from being supplied to the other input of
It is closed only in the first time slot among the 96 time slots in the sampling period. Thus, the adder 2112 accumulates 96 time slots in one sampling period for each output channel. The final output of the accumulator 2101 is the last time slot among the 96 time slots in one sampling period, and is shifted after the operation result determined by the assignment information A8 is selected by the selector 2111. This is data set in each stage of the register 2113. The data set in each of these stages is supplied to the internal DSP 205 (see FIG. 2) via the DSP input port 218 (see FIG. 3), and the output CH1 of the mixer 210 during the sampling period.
ＣＨCH8 are supplied as L signals.

In the accumulation in one sampling period, an overflow may occur depending on a selected multiplication result. Therefore, when an overflow occurs, the adder 2112 outputs a flag whose bit is “1” as overflow information. By determining at which timing the overflow information becomes “1” in one time slot, it is possible to detect in which output channel the overflow has occurred. Further, accumulators 2102 to 2104 have the same configuration as accumulator 2101. However, since the accumulators 2103 and 2104 are intended for the outputs CH9 to CH16, the selectors 2111 are supplied with the assignment information A9 to A16, and the outputs are supplied to the external output port 219 and the interface 204 (see FIG. 3). ) Via the external circuit 260
Supplied to

<2: Operation> Next, the operation of the above-described electronic musical instrument will be described. FIG. 10 is a flowchart showing the main operation of the electronic musical instrument. First, when the power switch is turned on in this electronic musical instrument, the CPU 10 performs an initialization process in step Sa1. This initialization processing corresponds to, for example, processing of resetting the RAM 12, reading the setting state stored in the external storage device 16 in the previous end processing, and setting the setting state as the current setting state. Next, C
The PU 10 checks the activation factor in Step Sa2. Here, the activation factor in this electronic musical instrument is
It is caused by the following reasons. That is, this activation factor is: occurs when the state of the keyboard 15 changes (synonymous with the occurrence of an event in MIDI);: occurs when the setting state of the panel switch 13 changes; : Generated by turning off the power switch,: Generated by a factor other than. In addition, regarding the state change of each part, the state of each part is checked, the state is stored in the RAM 12, and the state of each part stored at the time of the previous check is read and compared. Can be detected by determining. Can be started by the system clock. Next, the CPU 10
If it is determined in step Sa3 that the activation factor has not occurred, the processing procedure returns to step Sa2 and waits until the activation factor has occurred. If the activation factor has occurred, the process proceeds to the next step Sa4. It is determined whether the factor is due to any of the above.

<2-1: Keyboard Processing> As a result of this determination, if it is determined that the activation factor is caused by the
U10 executes a keyboard process in step Sa5. In such keyboard processing, there are two types of key pressing processing corresponding to key pressing and key releasing processing corresponding to key release. In the case of the former key pressing process, the CPU 10 transfers the information of the key-on KON by the key pressing to the tone generator circuit 200 and causes the sound source circuit 200 to make available from among the 64 sounding channels in order to cause the key pressing to sound. Is assigned for one channel. Here, if all the sound channels of the tone generator circuit 200 are in use, the CPU 10 silences the tone of the channel whose sound is most advanced or the channel whose sound is started earlier and has the lowest volume, and forcibly cancels the tone. A vacant channel is created, and this channel is allocated for sound generation related to the key depression. And CPU1
0 writes tone control data corresponding to the designated tone color, key code KC indicated by the key-on information, and key touch KT in the storage area of the control register 201 corresponding to the assigned tone generation channel. . In the tone generator circuit 200, the readout circuit 202
Based on the musical tone control data set to 1, an address is manipulated from the waveform memory 250 so that the waveform data of the designated timbre becomes the pitch designated by the key code KC attached to the key-on KON. This is read by the volume change control circuit 203, based on the musical tone control data also set in the control register 201.
The envelope of the waveform data is controlled so as to have a sound volume designated by T. In this way, generation of a tone signal corresponding to the key depression operation is started, and the generated tone signal is supplied to the mixer 210. As described above, the tone control data of the tone generation channel includes the mixer 210.
The settings # 1 to # 64 are included, and the setting # (n) corresponding to the sound channel n is set at the same time when the sound is started.

On the other hand, in the latter key release process, the CPU 10
Is the key-off K to the tone generator circuit 200 due to the key release.
The OFF information is transferred. Thereby, the sound source circuit 200
Then, the readout circuit 200 searches the 64 sounding channels for sounding channels that generate musical tones corresponding to the released keys, and if found, it is a key-off KOFF pair for the sounding channel. The reading of the waveform data performed by the key-on KON is stopped, and the generation of the tone signal is terminated. After the keyboard processing, the CPU 10 returns the processing procedure to step Sa2 in order to check the activation factor again.

<2-1-1: Mixing Operation> Here,
The mixing operation when a tone signal is supplied to the mixer 210 will be described. First, the amplitude value is controlled by the sound volume change control circuit 203 (see FIG. 2) so that the sound volume specified by the key touch KT becomes 6
The 4ch tone signal is input to the time slot converter 211 (see FIG. 3) inside the mixer 210. As shown in FIG. 8, the time slot converter 211 compresses the time slot width corresponding to each of the 64 sound source output channels to 2/3 while keeping the start point of the odd number slot. As a result, one empty slot is generated next to the even slot, and a total of 32 empty slots are generated as a whole. The selector 212 assigns an internal D from the internal DSP 205 to these empty slots.
The SP outputs ch1 to ch16 and the external inputs ch1 to ch16 input from the external circuit 260 are selected and sequentially assigned. Thus, for the 96 time slots obtained by compressing the 64 time slots, the sound source output 64ch,
A total of 96 channels including 16 channels output from the internal DSP 205 and 16 channels input from the external circuit 260 are individually allocated.

Next, the multiplier 215 (see FIG. 3)
As shown in the figure, one converted time slot is further
At each divided timing, the tone signals of the channel assigned to the time slot are sequentially multiplied by the multiplication coefficients M1 to M8 determined by the setting # (n) of the channel assigned to the time slot. . The latch circuit group 217 (see FIG. 3) latches these eight multiplication results, while the latch circuit 21
Reference numeral 6 latches a tone signal which is not multiplied. Therefore, the latch circuit group 217 and the latch circuit 216
, Input 1ch for one time slot
Since nine operation results are latched for the musical tone signal obtained by multiplying the musical tone signal by the multiplication coefficients M1 to M8 and for the musical tone signal which is not multiplied, the input 1ch before selection in the equivalent circuit shown in FIG. An operation result is obtained. Note that, because of the latch in the latch circuit group 217 and the latch circuit 216, the accumulation process is executed by shifting to the next time slot.

In the next time slot, the accumulator 21
The selector 2111 of No. 01 (see FIG. 4) has a setting # corresponding to the channel at the same timing as that of the multiplier 215 obtained by further dividing one time slot into eight.
(N) Assignment information A1 to A8 are sequentially supplied. Therefore, at the first timing, the selector 2111 selects the calculation result assigned to L of the output channel CH1 by the assignment information A1. This selection result is added to the shift register 2113 by the adder 2112.
Is added to the shift result of
If the time slot for processing is the first time slot in one sampling period, nothing is added to the selection result because the gate circuit 2114 is closed. At the next second timing, the selector 2111 selects the operation result assigned to L of the output channel CH2 based on the assignment information A2, while the shift register 2113
Shifts the stored content by one stage. Thereafter, by repeating the same operation until the eighth timing, the output channel CH1 is stored in the shift register 2113.
The selection results assigned to L of .about.CH8 are sequentially stored.

Next, when the processing starts in the next time slot, at the first timing, the shift register 2
From 113, the selection result at the first timing in the previous time slot is shifted, and the gate circuit 211
4 is supplied to the other input terminal of the adder 2112. Therefore, the L data of the output channel CH1 in the previous time slot is accumulated in the L data of the output channel CH1 in the current time slot. The same applies to the second to eighth timings. Therefore, in the current time slot, the shift register 2113 stores the result of accumulating the respective data of L of the output channels CH1 to CH8 in the previous time slot in each channel. Such an operation is performed for each of the 96 time slots in one sampling period.
When the process is executed for all of the 96 time slots, each stage of the shift register 2113 of the accumulator 2101 stores the accumulation results of L of the output channels CH1 to CH8 during the sampling period. Becomes Therefore, this becomes DS as each L output of the output channels CH1 to CH8 during the sampling period.
The signal is supplied to the internal DSP 205 via the P input port 218.

As for the accumulator 2102, the accumulator 210
1, the respective accumulation results of R of the output channels CH1 to CH8 in the sampling period are:
The signal is supplied to the internal DSP 205 via the DSP input port 218. As for the accumulator 2103, the accumulator 210
It operates similarly to 1, 2102. However, at the first to eighth timings in each time slot, the output channel CH is determined by the assignment information A9 to A16.
Operation results assigned to L of 9 to CH16 are selected, and the respective accumulation results are supplied to the external circuit 260 via the external output port 219 and the interface 204. The accumulator 2104 operates in the same manner as the accumulator 2103, so that each accumulation result of R of the output channels CH9 to CH16 in the sampling period is transmitted to the external circuit 260 via the external output port 219 and the interface 204. Supplied.

The CH1 to CH8 supplied to the internal DSP 205 via the DSP input port 218 are given a predetermined effect, and then re-input to the mixer 210 via the DSP output port 213. On the other hand, a part of the sound is generated via the DA converter 17 and the sound system 18. On the other hand, the outputs CH9 to CH16 supplied to the external circuit 260 via the external output port 219 and the interface 204 are again given to the mixer 210 via the interface 204 and the external input port 214 after the predetermined effects are given. Is entered. When a tone signal is input from the A / D converter 261 or the FM tone generator circuit 263, a part of the inputs CH9 to CH16 is allocated for the input. In addition, output CH9 ~
All of the channels 16 are always transferred from the mixer 210 to the external circuit 26.
It is not necessary to output to 0, and it is optional.

By such a mixing operation, the circuit shown in FIG. 7 is equivalently executed.

<2-2: Panel Switch Processing> The operation will be returned to the flowchart shown in FIG. When it is determined in step Sa4 that the activation factor is caused by the activation factor, the CPU 10 determines in step Sa6
, The panel switch process is executed, the setting state of the panel switch 13 is recognized, and the state of each unit is changed to the recognized setting state. Panel switches include tone select switches, tone edit switches, effect select switches, effect edit switches, mixer control switches, and other switches. In the panel switch processing, the performance tone is specified, edited, and internal The DSP 205 selects or sets a plurality of effects to be executed simultaneously, and sets the input / output signal levels of the external circuit 260. After the panel switch processing, the CPU 10 returns the processing procedure to step Sa2 again to check the activation factor.

<2-3: Flag Processing> Step S
As a result of the determination in a4, when it is determined that the activation factor is caused, the CPU 10 executes a flag process shown in FIG. 11 in step Sa7. This flag processing is executed at regular time intervals, specifically, at each timing when one time slot is divided into eight, and an overflow occurs in an output channel to be processed at the timing. This is a process of detecting whether or not the error has occurred, and displaying the fact on the display unit 14 to the user when the error has occurred. First, the CPU 10
In step Sb1, overflow information output from each adder of the accumulators 2101-2104 is fetched. Then, in step Sb2, the CPU 10 determines whether an overflow has occurred in any of the accumulators based on the captured overflow information. If the determination result is “Yes”, the CPU 10 proceeds to step S
In b3, first, the output channel (j) in which the overflow has occurred is specified from the accumulator that has output the overflow information and the timing at which the flag processing is started. For example, if the overflow information is output from the accumulator 2103 and the activation timing of the flag processing is the second timing in the time slot, the output channel in which the overflow has occurred is the L of the output CH10.
(That is, external output ch3 to the external circuit 260). Second, the CPU 10 causes the display unit 14 (see FIG. 1) to display that an overflow has occurred in the output channel ch (j), and prompts the user to set the input channel for the output channel ch (j). Warns you to lower the level setting. Third, the CPU 10 sets an initial value p in a register WT (j) provided corresponding to the output channel ch (j). Here, for convenience of explanation, the external outputs ch1 to ch to the external circuit 260 will be described.
16 as output channels 17 to 32, and the internal DSP 2
05 is assumed to be a serial number of the internal DSP inputs ch1 to ch16. Therefore, the register WT (j)
WT1 to WT32 output ch1 to ch3, respectively.
This corresponds to 2. On the other hand, if the determination result in the step Sb2 is “No”, the CPU 10
The processing procedure is performed in step S3 without executing the processing of step b3.
Skip to b4.

Next, in step Sb4, the CPU 10 decrements the registers WT1 to WT32 whose values set there are not "0" by "1". That is, the initial value p set in the register WT (j) is decremented by "1" every time the flag processing is started. And CPU
Reference numeral 10 denotes a register WT1 to WT in step Sb5.
It is determined whether or not any of the 32 does not have a value of “0” after decrement, and if so, in step Sb6, an overflow display of the output channel ch (j) corresponding to the register WT (j) is made. Is erased.

Thus, the display indicating that the overflow has occurred in the output channel ch (j) is displayed when the flag processing is started the number of times set by the initial value p from the time when the overflow no longer occurs. It is to be erased. Conversely, the initial value p indicates how long the display indicating that the overflow has occurred in the output channel from the time when the overflow no longer occurs is indicated by the number of times the flag processing is started. Then, if the decision result in the step Sb5 is "No", or when the process in the step Sb6 ends, the CPU 10 terminates this flag process.

By such a flag process, the user can
The overflow can be dealt with by recognizing the output channel where the overflow has occurred and lowering the level setting of the input channel with respect to the output channel. In this embodiment, the output channel in which the overflow has occurred is only displayed on the display unit 14. However, the CPU 10 automatically sets the input gain in the output channel and automatically handles the overflow. It is good.

<2-4: Termination Processing> The operation will be returned to the flowchart shown in FIG. If it is determined in step Sa4 that the activation factor is caused, the CPU 10 determines in step Sa8 that
For example, after executing a termination process such as saving the setting state of each unit in the external storage device 16, the power supply is actually turned off. Thus, the operation as the electronic musical instrument ends.

<2-5: Other Processing> If it is determined in step Sa4 that the activation factor is caused by the activation factor, the CPU 10 executes the processing corresponding to the activation factor in step Sa9. Thereafter, the processing procedure returns to step Sa2.

<3: Effect of Mixer> Now, the internal DSP 205 in such an electronic musical instrument converts the tone signal into
It is an aggregate of effect giving means (effect blocks) for giving a certain sound effect. The same applies to the external DSP 264 in the external circuit 260. Here, internal DSP2
05 and the external DSP 264, for example, as shown in FIG.
Consider the case where an effect algorithm is constructed as shown in FIG. In FIG. 12, five effects of an insertion effect 1, a low-pass filter, an effect 1 and an effect 2, and an equalizer are set in the internal DSP 205 according to the operation of the panel switch, and the external DSP 264 has one external effect. DSP
An effect has been set. And the mixer has D
Five stereo output channels to SP and one stereo output channel for external DSP effects are set.

In the case of the configuration of FIG. 12, the mixer 210 can handle the input and output of the effect block in the internal DSP 205 and the input and output of the effect block to the external DSP 264 in the same position as shown in FIG. . This means that the user does not need to pay special attention to the effect blocks of the internal DSP 205 and the effect blocks of the external 264 when constructing a desired effect algorithm. Therefore,
For the user, building an effect algorithm,
It is possible to reduce the burden when setting the mixing.

The fact that there is no need to distinguish between the effect block of the internal DSP 205 and the effect block of the external 264 is that even if another external DSP is introduced,
This means that the internal DSP 205 and the external DSP 264 can be handled in the same position. For this reason, the mixer 210 in the present embodiment can make the function expansion transparent to the user, so that a more complicated effect block can be easily constructed. Further, as can be seen from FIG. 13, in the mixer 210, the internal sound source output and the external output supplied via the A / D converter 261 can be handled in the same position. In this sense, the burden on the user in the construction of the effect algorithm and the setting of the mixing can be reduced. In FIG. 12, the tone generator outputs simultaneously generate different tones. However, this can be set so that the keyboard 15 generates a guitar tone in one region and a piano tone in another region. It is.

In this case, of the 64 tone generation channels, the tone tone control data of the guitar tone is set in the corresponding area of the control register in the channel to which the tone corresponding to the key tone of the guitar tone is assigned, and the key tone of the piano tone is pressed. In the channel to which the tone corresponding to the tone is assigned, the tone color control data of the piano tone is assigned. While the piano tone is being generated, the outputs of a plurality of channels are mixed by a mixer and supplied to an insertion effect executed by an internal DSP. Here, the setting of the mixer is performed by the assignment information A4. In addition, “000”, that is, “do not output” is set to the assignment information A (j) other than the mixer.

On the other hand, a plurality of channels sounding in a guitar tone are mixed by a mixer (A1), a mixer (A2), a mixer (A3), and a mixer (A9) and supplied to each effect block. External A / D converter 26
The output of 1 is supplied to a low-pass filter through a mixer. The output of the equalizer is D from the internal DSP.
It is set to output to AC17. By setting the control register 201, any one of the 16 mixer outputs can be selected and written as waveform data to the waveform memory through the readout circuit.

In this embodiment, as shown in FIG.
External circuits such as A / D converter, external sound source, external DSP
Since the tone generator and DSP inside the chip can be handled in the same manner, the function of the tone generator circuit 200 can be easily and freely expanded by adding an external circuit. 12 and 13
In, the insertion effect is an effect block unique to the timbre. Further, the effect blocks shown in FIG. 13 are examples, and do not show all blocks that can be constructed in the internal DSP 205.
The same applies to the external DSP 264.

Further, the mixer 210 according to the present embodiment
Share the accumulators for accumulating the outputs of the internal circuit 205 and the external DSP 264, so that the circuit scale can be simplified as a whole. In addition, the mixer 210
According to this method, since the tone signal is processed in stereo units, the handling is simplified for both the user and the device. For example, in the mixer 210, four multiplication results, that is, eight multiplication results are obtained for the L and R signals for the input channel 1ch. The multiplication coefficients for this operation are pan information L and R and level information S
Only six in total from 1 to S4 are required. For this reason, various information can be simplified. Mixing information on the input side of the mixer 210 is set in a common manner using information of setting # (i), and mixing information on the output side of the mixer 210 is commonly used using the assignment information A1 to A16. Is set by In the embodiment, the input side of the mixer 210 includes an internal sound source, an internal DSP, an external input, and the like.
It can be handled in the same way as input to a mixer from a PC and setting is easy. The output side of the mixer 210 includes an internal DSP and an external output in the embodiment, but the external output can be handled in the same manner as the mixer output to the internal DSP and can be easily set. In the embodiment, the internal D
Although the case where the mixer output is supplied to the D / A converter via the SP has been described, instead, the mixer output is directly supplied to the D / A converter.
You may output to a converter. Also in this case, it can be handled in the same manner as output to the internal circuit, and setting is easy.

<4: Others> In the above-described embodiment, the information of the setting # (n) is transmitted to the panel switch 13.
However, it is also possible to display a screen imitating a panel switch on the display unit 14 and operate the screen, that is, a so-called GUI (graphical user interface). Further, in the above-described embodiment, the generation of musical tones is controlled in accordance with the keyboard operation. However, the present invention is not limited to this.
MIDI such as note-on and note-off input from the terminal
Control may be performed according to an event, or control may be performed according to an event such as a note-on or note-off that is reproduced by reproducing music data. Further, the performance input is not limited to the example of one part and two parts in the above-described embodiment, and may include input of 16 parts of MIDI or more performance parts. Thereby, the timbre is set for each part, and it is possible to perform an ensemble performance with a plurality of timbres.

[0051]

As described above, according to the present invention, the overall circuit scale is reduced, the expansion is easy, and
External input can be easily handled.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an electronic musical instrument according to an embodiment to which the present invention has been applied.

FIG. 2 is a block diagram illustrating a configuration of a sound source circuit according to the first embodiment.

FIG. 3 is a block diagram showing a configuration of a mixer in the sound source circuit.

FIG. 4 is a block diagram showing a configuration of an accumulator in the mixer.

FIG. 5 is a block diagram for explaining each input / output channel in the mixer.

FIG. 6A is a diagram for explaining information of setting # (n) for processing each input channel in the same mixer, and FIG. 6B is information of the setting # (n). It is a figure for demonstrating the determined multiplication coefficient, (c) is a chart for demonstrating the content of the assignment information A (n) among the setting # (n).

FIG. 7 is a diagram showing an equivalent circuit of a mixing process in the mixer.

FIG. 8 is a timing chart for explaining a time slot conversion operation in the mixer.

FIG. 9 is a timing chart for explaining an operation of a mixing process in the mixer.

FIG. 10 is a flowchart showing an overall operation of the electronic musical instrument.

FIG. 11 is a flowchart showing flag processing of the electronic musical instrument.

FIG. 12 is a block diagram showing an example of an effect block constructed by the mixer, an internal DSP, and an external circuit.

FIG. 13 is a block diagram for explaining an equal relationship between an internal DSP and an external circuit by the mixer.

[Explanation of symbols]

100 ... CPU (detection means), 211 ... time slot converter (first input means, conversion means), 212 ...
Selectors (assigning means by 211 and 212), 213 ...
... DSP output port, 214 ... external input port (21
.., Multipliers (arithmetic means), 2101-2104... Accumulators (accumulators), 2111... Selectors (output means)

Claims (5)

[Claims] 1. n (n is an integer) number of time slots
First input means for inputting tone signals generated independently of each other in a channel, and n time slots in the input tone signal are represented by m
Converting means for converting (m is an integer satisfying m> n) time slots and assigning the tone signal to n of the m time slots; A second input means for inputting a signal, and a tone signal of a maximum (mn) channel inputted by the second input means, the remaining (mn) of the m time slots And a mixing means for inputting a tone signal assigned to each time slot and performing m-channel time-division mixing processing to generate a mixed signal for a plurality of output channels. Mixing equipment. 2. The mixing apparatus further comprises: stereo location information and k (k is an integer) for each tone signal assigned to the m time slots.
Level information and designating means for designating selection information of each output channel in units of stereo waveforms. The mixing means, for the assigned tone signal, the localization information and the k 2 based on level information
multiplying k multiplication coefficients and selectively accumulating a plurality of tone signals obtained by the multiplication for each output channel based on the selection information to generate a mixed tone signal for a plurality of output channels. The mixing device according to claim 1, wherein 3. The mixing apparatus according to claim 1, further comprising: detecting whether an overflow has occurred in the mixing process for each output channel at predetermined time intervals, and executing a corresponding (display) process for each channel. The mixing device according to claim 1, further comprising: means. 4. The mixing device further comprises:
Means for specifying mixing control information in a common mode for each of the tone signals assigned to the time slots. At the timing when the generation of the n-channel tone is started, n of the m mixing control signals are generated. The mixing apparatus according to claim 1, further comprising: the specification unit that specifies information and specifies the (m-n) -channel mixing control information in accordance with a setting operation related to a second input. . 5. A tone signal generating means for generating a tone signal on a plurality of time-division channels, a processing means for subjecting an input tone signal to waveform signal processing and outputting a signal-processed tone signal, Input means for inputting a signal; output means for outputting a tone signal to the outside; means for holding mixing information; and inputting a plurality of tone signals supplied from the tone signal generating means, the processing means and the input means. Performing a mixing process based on the mixing information and outputting the plurality of mixed waveform signals obtained to the processing unit and the output unit. The plurality of tone signals input from the tone signal generating means, the processing means, and the input means are set in a common mode, and A musical tone signal output to said output means and said output means.