JPH1185341A - Bus driver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively suppress a ringing generated on a bus and to make data fast transmittable through the bus, by connecting a series-connected resistance and a capacitive component between an output terminal and a power source, which has a specified potential. SOLUTION: This driver has a MOS transistor 11, which has its source grounded (GND), the series resistance 21, which has one terminal connected to the drain of the MOS transistor 11, and the capacitive component (capacitor) 13 connected between the other terminal of the series resistance 12 and the GND. For example, when a bus line is driven by using a driver having a series resistance 12 of 20 Ωand a capacitor 13 of 10 pF connected and the time of a waveform on another bus card is simulated, a ring-back generated on the bus line can speedily be converged and the data transmission can be made fast by the bus.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a bus driver, and more particularly, to a bus driver for driving a high-speed bus.

[0002]

2. Description of the Related Art As a conventional bus driver, an open drain type bus driver using a MOS transistor as shown in FIG. 5 is known. This type of bus driver is described in, for example, JP-A-6-35582.

[0003]

When the bus is driven using a conventional bus driver, ringing occurs on the bus. This ringing is a factor that limits the data transfer rate of the bus.

[0004] Japanese Patent Application Laid-Open No. 6-35582 discloses that the output rise is set to 3 ns in order to suppress the occurrence of ringing.
It is described that the bus driver is used as described above. However, even if such a method is adopted,
Ringing that occurs on the bus cannot be suppressed.

As described above, when a conventional bus driver is used to drive a bus line, there is a problem that ringing generated on the bus limits the data transmission speed of the bus.

An object of the present invention is to provide a bus driver which can effectively suppress ringing generated on a bus and can speed up data transmission by the bus.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a bus driver for connecting an output terminal to a bus and driving the bus.
A series resistor and a capacitive component connected in series are connected between the output terminal and a power supply having a specific potential.

Specifically, the power supply having the specific potential is a ground.

The present invention also relates to a source grounded MOS.
In a bus driver for driving a bus by connecting a drain of a transistor to a bus, a series resistor and a capacitive component connected in series are connected between the drain and a power supply having a specific potential. .

Specifically, the power supply having the specific potential is a ground.

[0011]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. FIG.
Is a MOS transistor 11 having a source connected to ground (GND), a series resistor 12 having one terminal connected to the drain of the MOS transistor 11, and the other terminal of the series resistor 12 connected to ground (GND). ) And a capacitive component (capacitor) connected between them.

A simulation for driving the bus shown in FIG. 2 was performed using this bus driver. The bus of FIG. 2 has 56Ω at both ends of a bus bus 21 which is a standard bus.
Are connected to each other, and first to seventh connectors 24 are mounted on the bus line. Of these connectors 24, the first and third to seventh connectors 24 have stubs 25, respectively.
Via the bus card 26 (PKG-1, PKG-3, PKG-1)
KG-4, PKG-5, PKG-6, and PKG-7)
Is inserted and connected. The length between the connectors is 1.4 inches, 2.0 inches, 1.8 inches, and 1.
The lengths are 8 inches, 2.0 inches, and 1.0 inches, and the lengths of the stubs 25 are all 1 inch. Note that P
The reason why KG-2 was not connected is that the measured waveform was most deteriorated in this connection mode.

When the conventional bus driver is mounted on the third bus card, the bus line 21 is driven, and the time change of the waveform in the other bus card is simulated, the result shown in FIG. 3 is obtained.

On the other hand, a series resistance 12
From the third bus card to the bus line 2 using the bus driver of the present invention in which the third bus card and the capacitive component 13 of 10 pF are connected.
1 was driven to simulate the time change of the waveform in the other bus card, and the result as shown in FIG. 4 was obtained.

As is clear from FIGS. 3 and 4, the convergence of the ringback is made faster by using the bus driver of this embodiment.

As described above, one terminal of the series resistor is connected to the drain of the MOS transistor whose source is grounded, and a capacitive component is connected between the other terminal of the series resistor and the ground to form a bus driver. As a result, ringback occurring on the bus line driven by the bus driver can be quickly converged, and data transmission can be further speeded up by the bus.

In the above-described embodiment, the capacitive component is directly connected to the ground. However, the same effect can be obtained even when the capacitive component is connected to a power supply that operates in the same manner as the ground.

Further, the values of the series resistance and the capacitive component exemplify the most appropriate values, and are adjusted as necessary in an actual circuit.

[0020]

According to the present invention, a source-grounded MO is provided.
By connecting a series-connected series resistor and a capacitive component between the drain of a bus driver having an S transistor and the ground, ringing generated on a bus line driven by this bus driver is quickly converged. And the data transmission speed of the bus can be increased.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a bus to which the bus driver of FIG. 1 is applied;

FIG. 3 is a graph showing a simulation result of driving the bus of FIG. 2 with a conventional bus driver.

FIG. 4 is a graph showing a simulation result of driving the bus of FIG. 2 using the bus driver of FIG. 1;

FIG. 5 is a circuit diagram of a conventional bus driver.

[Explanation of symbols]

 Reference Signs List 11 MOS transistor 12 Series resistor 13 Capacitive component 21 Bus line 22, 23 Terminating resistor 24 Connector 25 Stub 26 Bus card

Claims (6)

[Claims] 1. A bus driver for connecting an output terminal to a bus and driving the bus, wherein a series-connected series resistor and a capacitive component are connected between the output terminal and a power supply having a specific potential. A bus driver, characterized in that: 2. The bus driver according to claim 1, wherein the power supply having the specific potential is a ground. 3. The bus driver according to claim 1, wherein the series resistance is 20Ω, and the capacitance of the capacitive component is 10 pF. 4. A bus driver for driving a bus by connecting the drain of a source-grounded MOS transistor to a bus, wherein a series resistor and a capacitive resistor are connected in series between the drain and a power supply having a specific potential. A bus driver characterized by connecting components. 5. The bus driver according to claim 4, wherein the power supply having the specific potential is a ground. 6. The bus driver according to claim 4, wherein the series resistance is 20Ω, and the capacitance of the capacitive component is 10 pF.