JPS4847275A - - Google Patents

Info

Publication number
JPS4847275A
JPS4847275A JP47101220A JP10122072A JPS4847275A JP S4847275 A JPS4847275 A JP S4847275A JP 47101220 A JP47101220 A JP 47101220A JP 10122072 A JP10122072 A JP 10122072A JP S4847275 A JPS4847275 A JP S4847275A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP47101220A
Other languages
Japanese (ja)
Other versions
JPS5329273B2 (de
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4847275A publication Critical patent/JPS4847275A/ja
Publication of JPS5329273B2 publication Critical patent/JPS5329273B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405—Edge mounted components, e.g. terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/453—Leadframes comprising flexible metallic tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/124—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed the encapsulations having cavities other than that occupied by chips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of flexible or folded printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10386—Clip leads; Terminals gripping the edge of a substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
JP10122072A 1971-10-14 1972-10-11 Expired JPS5329273B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7114112A NL7114112A (de) 1971-10-14 1971-10-14

Publications (2)

Publication Number Publication Date
JPS4847275A true JPS4847275A (de) 1973-07-05
JPS5329273B2 JPS5329273B2 (de) 1978-08-19

Family

ID=19814253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10122072A Expired JPS5329273B2 (de) 1971-10-14 1972-10-11

Country Status (10)

Country Link
JP (1) JPS5329273B2 (de)
AU (1) AU474165B2 (de)
CA (1) CA964382A (de)
CH (1) CH545006A (de)
DE (1) DE2249730C3 (de)
FR (1) FR2156343B1 (de)
GB (1) GB1403786A (de)
IT (1) IT968868B (de)
NL (1) NL7114112A (de)
SE (1) SE378706B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL189379C (nl) * 1977-05-05 1993-03-16 Richardus Henricus Johannes Fi Werkwijze voor inkapselen van micro-elektronische elementen.
US4377316A (en) * 1981-02-27 1983-03-22 International Business Machines Corporation High density interconnection means for chip carriers
DE3530827A1 (de) * 1985-08-29 1987-03-05 Vdo Schindling Kontaktvorrichtung
DE10342295B4 (de) * 2003-09-12 2012-02-02 Infineon Technologies Ag Anordnung eines elektrischen Bauelements mit einer elektrischen Isolationsfolie auf einem Substrat und Verfahren zum Herstellen der Anordnung

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1534329A (fr) * 1966-08-16 1968-07-26 Signetics Corp Procédé de montage de circuits intégrés

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method

Also Published As

Publication number Publication date
CH545006A (de) 1973-11-30
DE2249730A1 (de) 1973-04-19
DE2249730C3 (de) 1980-11-13
FR2156343B1 (de) 1977-12-23
AU4752572A (en) 1974-04-26
NL7114112A (de) 1973-04-17
FR2156343A1 (de) 1973-05-25
SE378706B (de) 1975-09-08
IT968868B (it) 1974-03-20
AU474165B2 (en) 1976-07-15
JPS5329273B2 (de) 1978-08-19
DE2249730B2 (de) 1980-01-24
GB1403786A (en) 1975-08-28
CA964382A (en) 1975-03-11

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