JPS4971872A - - Google Patents
Info
- Publication number
- JPS4971872A JPS4971872A JP11327772A JP11327772A JPS4971872A JP S4971872 A JPS4971872 A JP S4971872A JP 11327772 A JP11327772 A JP 11327772A JP 11327772 A JP11327772 A JP 11327772A JP S4971872 A JPS4971872 A JP S4971872A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11327772A JPS4971872A (ja) | 1972-11-10 | 1972-11-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11327772A JPS4971872A (ja) | 1972-11-10 | 1972-11-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS4971872A true JPS4971872A (ja) | 1974-07-11 |
Family
ID=14608082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11327772A Pending JPS4971872A (ja) | 1972-11-10 | 1972-11-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS4971872A (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51113465A (en) * | 1975-03-28 | 1976-10-06 | Hitachi Ltd | Lead frame |
| JPH0595043U (ja) * | 1991-12-31 | 1993-12-24 | 太陽誘電株式会社 | 半導体チップの実装回路基板 |
-
1972
- 1972-11-10 JP JP11327772A patent/JPS4971872A/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51113465A (en) * | 1975-03-28 | 1976-10-06 | Hitachi Ltd | Lead frame |
| JPH0595043U (ja) * | 1991-12-31 | 1993-12-24 | 太陽誘電株式会社 | 半導体チップの実装回路基板 |