JPS51150276A - Package structure of ic - Google Patents
Package structure of icInfo
- Publication number
- JPS51150276A JPS51150276A JP50073860A JP7386075A JPS51150276A JP S51150276 A JPS51150276 A JP S51150276A JP 50073860 A JP50073860 A JP 50073860A JP 7386075 A JP7386075 A JP 7386075A JP S51150276 A JPS51150276 A JP S51150276A
- Authority
- JP
- Japan
- Prior art keywords
- package structure
- chips
- permits
- ease
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/099—Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
Landscapes
- Wire Bonding (AREA)
Abstract
PURPOSE: A confidential wireless bonding method by which IC chips are bonded to a circuit substrate with ease and which permits a multiple pin bonding.
COPYRIGHT: (C)1976,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50073860A JPS51150276A (en) | 1975-06-18 | 1975-06-18 | Package structure of ic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50073860A JPS51150276A (en) | 1975-06-18 | 1975-06-18 | Package structure of ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS51150276A true JPS51150276A (en) | 1976-12-23 |
Family
ID=13530330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50073860A Pending JPS51150276A (en) | 1975-06-18 | 1975-06-18 | Package structure of ic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS51150276A (en) |
-
1975
- 1975-06-18 JP JP50073860A patent/JPS51150276A/en active Pending
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