JPS526478A - Manufacturing method for semiconductor integrated circuit - Google Patents

Manufacturing method for semiconductor integrated circuit

Info

Publication number
JPS526478A
JPS526478A JP50083267A JP8326775A JPS526478A JP S526478 A JPS526478 A JP S526478A JP 50083267 A JP50083267 A JP 50083267A JP 8326775 A JP8326775 A JP 8326775A JP S526478 A JPS526478 A JP S526478A
Authority
JP
Japan
Prior art keywords
manufacturing
integrated circuit
semiconductor integrated
elements formed
electric characteristics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50083267A
Other languages
Japanese (ja)
Inventor
Hideyuki Kondo
Kenichiro Uono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP50083267A priority Critical patent/JPS526478A/en
Publication of JPS526478A publication Critical patent/JPS526478A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs
    • H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors

Landscapes

  • Element Separation (AREA)

Abstract

PURPOSE:To have different electric characteristics on one portion of plural semiconductor elements formed on semiconductor substrate and to avoid interaction each other, by use of ion injection application.
JP50083267A 1975-07-07 1975-07-07 Manufacturing method for semiconductor integrated circuit Pending JPS526478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50083267A JPS526478A (en) 1975-07-07 1975-07-07 Manufacturing method for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50083267A JPS526478A (en) 1975-07-07 1975-07-07 Manufacturing method for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS526478A true JPS526478A (en) 1977-01-18

Family

ID=13797568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50083267A Pending JPS526478A (en) 1975-07-07 1975-07-07 Manufacturing method for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS526478A (en)

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