JPS5382184A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5382184A
JPS5382184A JP15869276A JP15869276A JPS5382184A JP S5382184 A JPS5382184 A JP S5382184A JP 15869276 A JP15869276 A JP 15869276A JP 15869276 A JP15869276 A JP 15869276A JP S5382184 A JPS5382184 A JP S5382184A
Authority
JP
Japan
Prior art keywords
semiconductor device
restricting
collector
surrounding
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15869276A
Other languages
Japanese (ja)
Inventor
Tsuneo Funatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15869276A priority Critical patent/JPS5382184A/en
Publication of JPS5382184A publication Critical patent/JPS5382184A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain the element of high performance, by surrounding the base of the longitudinal NPN transistor with insulating layer, and by restricting the junction area with the collector, in I<2>L.
JP15869276A 1976-12-27 1976-12-27 Semiconductor device Pending JPS5382184A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15869276A JPS5382184A (en) 1976-12-27 1976-12-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15869276A JPS5382184A (en) 1976-12-27 1976-12-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5382184A true JPS5382184A (en) 1978-07-20

Family

ID=15677260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15869276A Pending JPS5382184A (en) 1976-12-27 1976-12-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5382184A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132285A (en) * 1974-09-13 1976-03-18 Hitachi Ltd
JPS5179591A (en) * 1975-01-06 1976-07-10 Hitachi Ltd
JPS52146574A (en) * 1976-05-31 1977-12-06 Sony Corp Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132285A (en) * 1974-09-13 1976-03-18 Hitachi Ltd
JPS5179591A (en) * 1975-01-06 1976-07-10 Hitachi Ltd
JPS52146574A (en) * 1976-05-31 1977-12-06 Sony Corp Semiconductor device

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