JPS54119905A - Pcm type recorder - Google Patents

Pcm type recorder

Info

Publication number
JPS54119905A
JPS54119905A JP2657978A JP2657978A JPS54119905A JP S54119905 A JPS54119905 A JP S54119905A JP 2657978 A JP2657978 A JP 2657978A JP 2657978 A JP2657978 A JP 2657978A JP S54119905 A JPS54119905 A JP S54119905A
Authority
JP
Japan
Prior art keywords
data
flop
flip
starting signals
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2657978A
Other languages
Japanese (ja)
Inventor
Yasunori Kanazawa
Keizo Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2657978A priority Critical patent/JPS54119905A/en
Publication of JPS54119905A publication Critical patent/JPS54119905A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

PURPOSE: To accurately detect a data heading signal and prevent the increase in the recording density, by recording data starting signals at a data level within one horizontal scanning interval just after a vertical synchronizing interval.
CONSTITUTION: The data starting signals N1WN2 are recorded at the data level in the same pattern within one horizontal scanning interval CiWCi+1. Control signals L1, L2 are recorded between the data starting signals N1WN2. In a reproducing system, the signal N1 is counted by a counter 7 to set a flip-flop 8 and the final bit of the signal N2 is counted 9 to set a flip-flop 10 so that the writing to a shift registers 5 is finished and the writing to a shift register 12 is started. When a predetermined number of bits are written in the register 12, the contents of the resistors 5, 12 are collated 14 with each other. If the contents coincide with each other, a flip- flop 16 is set to send out required information through a gate 17. Thus, the data starting signals can be stably supplied.
COPYRIGHT: (C)1979,JPO&Japio
JP2657978A 1978-03-10 1978-03-10 Pcm type recorder Pending JPS54119905A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2657978A JPS54119905A (en) 1978-03-10 1978-03-10 Pcm type recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2657978A JPS54119905A (en) 1978-03-10 1978-03-10 Pcm type recorder

Publications (1)

Publication Number Publication Date
JPS54119905A true JPS54119905A (en) 1979-09-18

Family

ID=12197453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2657978A Pending JPS54119905A (en) 1978-03-10 1978-03-10 Pcm type recorder

Country Status (1)

Country Link
JP (1) JPS54119905A (en)

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