JPS54122008A - Data transmission system - Google Patents

Data transmission system

Info

Publication number
JPS54122008A
JPS54122008A JP2931678A JP2931678A JPS54122008A JP S54122008 A JPS54122008 A JP S54122008A JP 2931678 A JP2931678 A JP 2931678A JP 2931678 A JP2931678 A JP 2931678A JP S54122008 A JPS54122008 A JP S54122008A
Authority
JP
Japan
Prior art keywords
supplied
bit
coder
circuit
generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2931678A
Other languages
Japanese (ja)
Other versions
JPS5819179B2 (en
Inventor
Meiki Yahata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP53029316A priority Critical patent/JPS5819179B2/en
Publication of JPS54122008A publication Critical patent/JPS54122008A/en
Publication of JPS5819179B2 publication Critical patent/JPS5819179B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To nearly eliminate error detection even if several bits become out of word synchronism by transmitting shortened cyclic codes with a single bit ''1'' or several bits starting and ending by ''1''s inserted between words of the codes. CONSTITUTION:From clock generator 33 to information source 31, the K-number continuous clock pulses (a) are supplied and information data (b) of K bits generated by information source 31 in the non-return-to-zero format is supplied to shortening cyclic coder 32. Each (n)-bit word of shortened cyclic codes is supplied to OR circuit 34. The (n+1)-th pulse of clock pulse (c) supplied from generator 33 to coder 32 is absent and there is a vacancy for one bit between shortened cyclic codes of each (n)-bit word outputted from coder 32. Signal (e) is supplied from generator 33 to OR circuit 34 and a one-bit signal of ''1'' is inserted into words from circuit 34, so that signal (f) will be outputted.
JP53029316A 1978-03-16 1978-03-16 Data transmission method Expired JPS5819179B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53029316A JPS5819179B2 (en) 1978-03-16 1978-03-16 Data transmission method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53029316A JPS5819179B2 (en) 1978-03-16 1978-03-16 Data transmission method

Publications (2)

Publication Number Publication Date
JPS54122008A true JPS54122008A (en) 1979-09-21
JPS5819179B2 JPS5819179B2 (en) 1983-04-16

Family

ID=12272806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53029316A Expired JPS5819179B2 (en) 1978-03-16 1978-03-16 Data transmission method

Country Status (1)

Country Link
JP (1) JPS5819179B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0879229A (en) * 1994-09-09 1996-03-22 Nec Corp Synchronous data transmission system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0185591U (en) * 1987-11-27 1989-06-07

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295901A (en) * 1976-02-09 1977-08-12 Nec Corp Error control device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295901A (en) * 1976-02-09 1977-08-12 Nec Corp Error control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0879229A (en) * 1994-09-09 1996-03-22 Nec Corp Synchronous data transmission system

Also Published As

Publication number Publication date
JPS5819179B2 (en) 1983-04-16

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