JPS5423568U - - Google Patents

Info

Publication number
JPS5423568U
JPS5423568U JP1977096660U JP9666077U JPS5423568U JP S5423568 U JPS5423568 U JP S5423568U JP 1977096660 U JP1977096660 U JP 1977096660U JP 9666077 U JP9666077 U JP 9666077U JP S5423568 U JPS5423568 U JP S5423568U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1977096660U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1977096660U priority Critical patent/JPS5423568U/ja
Publication of JPS5423568U publication Critical patent/JPS5423568U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1977096660U 1977-07-19 1977-07-19 Pending JPS5423568U (2)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977096660U JPS5423568U (2) 1977-07-19 1977-07-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977096660U JPS5423568U (2) 1977-07-19 1977-07-19

Publications (1)

Publication Number Publication Date
JPS5423568U true JPS5423568U (2) 1979-02-16

Family

ID=29030749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977096660U Pending JPS5423568U (2) 1977-07-19 1977-07-19

Country Status (1)

Country Link
JP (1) JPS5423568U (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195856A (ja) * 1983-04-20 1984-11-07 Fujitsu Ltd 半導体装置及びその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147667A (2) * 1974-05-16 1975-11-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147667A (2) * 1974-05-16 1975-11-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195856A (ja) * 1983-04-20 1984-11-07 Fujitsu Ltd 半導体装置及びその製造方法

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