JPS5445562A - Gate control method for thyristor convertor - Google Patents

Abstract

PURPOSE: To minimize the required gate power, by controlling the gate of thyristor, based on the AND output of the forward voltage signal detected more than a given value.

CONSTITUTION: In normal operation, although the arm forward voltage is applied from t=t1, no forward voltage signal FVS is developed until t=t2. Since the arm forward voltage reaches the forward voltage detection level VFVL at t=t2, the forward voltage signal FVS is taken place. However, since the gate control reference PHS is zero from t=t2 to t=t3, no gate pulse is taken place and the gate pulse GP τ in the pulse width is taken place at the same time when the reference PHS is taken place at t=t3. Since the arm current is discontinuous during the conduction period at the cycle started from t=t4, twice gate pulse GP is taken place during conduction region. It is suitable for the pulse width τ of the gate pulse GP for several μ sec to several tens of μ sec, relating to the turn on time of thyristors. Accordingly, the disadvantage of conventional defects can be eliminated and the system is simple and the tage pulse width can be decreased extremely

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