JPS5449011A - Receiver for transmission data - Google Patents

Receiver for transmission data

Info

Publication number
JPS5449011A
JPS5449011A JP11592677A JP11592677A JPS5449011A JP S5449011 A JPS5449011 A JP S5449011A JP 11592677 A JP11592677 A JP 11592677A JP 11592677 A JP11592677 A JP 11592677A JP S5449011 A JPS5449011 A JP S5449011A
Authority
JP
Japan
Prior art keywords
output
gate
data signal
memory
start bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11592677A
Other languages
Japanese (ja)
Inventor
Hidenori Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP11592677A priority Critical patent/JPS5449011A/en
Publication of JPS5449011A publication Critical patent/JPS5449011A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To detect a start bit accurately by stopping the inputting of clock signals to a latching memory when the output of a shift register agrees with a fixed output pattern and by discriminating the start bit and noises in a reception data signal. CONSTITUTION:A reception data signal after being inverted by inverter 3 is inputted to latching memory 1, and the outputs of clock generator 7 and FF6 are inputted to the clock terminal of memory 1 via AND gate 4. In addition, the data signal inverted by inverter 3 is applied to the input terminal of shift register 2, and the output of gate 4 to the clock terminal. The output of this register 2 is applied to AND gate 5 and when all of output terminals A to D are ''H'' in level, the output of gate 5 is applied to the set terminal of FF6; and then, the output of FF6 causes gate 4 to stop generating its output, thereby cutting off clocks to register 2 and memory 1. Consequently, the start bit in the reception data signal can be detected accurately.
JP11592677A 1977-09-26 1977-09-26 Receiver for transmission data Pending JPS5449011A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11592677A JPS5449011A (en) 1977-09-26 1977-09-26 Receiver for transmission data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11592677A JPS5449011A (en) 1977-09-26 1977-09-26 Receiver for transmission data

Publications (1)

Publication Number Publication Date
JPS5449011A true JPS5449011A (en) 1979-04-18

Family

ID=14674603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11592677A Pending JPS5449011A (en) 1977-09-26 1977-09-26 Receiver for transmission data

Country Status (1)

Country Link
JP (1) JPS5449011A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60165143A (en) * 1984-01-21 1985-08-28 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Data transmitting method and station

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60165143A (en) * 1984-01-21 1985-08-28 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Data transmitting method and station

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