JPS54573A - Transistor - Google Patents

Transistor

Info

Publication number
JPS54573A
JPS54573A JP6554677A JP6554677A JPS54573A JP S54573 A JPS54573 A JP S54573A JP 6554677 A JP6554677 A JP 6554677A JP 6554677 A JP6554677 A JP 6554677A JP S54573 A JPS54573 A JP S54573A
Authority
JP
Japan
Prior art keywords
transistor
insulating substrate
base
holes provided
improve workability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6554677A
Other languages
Japanese (ja)
Inventor
Kazuhide Deguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6554677A priority Critical patent/JPS54573A/en
Publication of JPS54573A publication Critical patent/JPS54573A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To improve workability and produce devices of uniform characteristics by passing emitter, base, and collector terminals through the holes provided on the respectively opposing metallized regions on an insulating substrate and electromechanically connecting these.
COPYRIGHT: (C)1979,JPO&Japio
JP6554677A 1977-06-02 1977-06-02 Transistor Pending JPS54573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6554677A JPS54573A (en) 1977-06-02 1977-06-02 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6554677A JPS54573A (en) 1977-06-02 1977-06-02 Transistor

Publications (1)

Publication Number Publication Date
JPS54573A true JPS54573A (en) 1979-01-05

Family

ID=13290113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6554677A Pending JPS54573A (en) 1977-06-02 1977-06-02 Transistor

Country Status (1)

Country Link
JP (1) JPS54573A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6030539U (en) * 1983-08-09 1985-03-01 富士電機株式会社 semiconductor equipment
US4876102A (en) * 1987-12-30 1989-10-24 The Procter & Gamble Company Potato based dough containing highly pectinated cellulosic fibers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6030539U (en) * 1983-08-09 1985-03-01 富士電機株式会社 semiconductor equipment
US4876102A (en) * 1987-12-30 1989-10-24 The Procter & Gamble Company Potato based dough containing highly pectinated cellulosic fibers

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