JPS5465437A - Rom/ram checking system - Google Patents

Rom/ram checking system

Info

Publication number
JPS5465437A
JPS5465437A JP13222177A JP13222177A JPS5465437A JP S5465437 A JPS5465437 A JP S5465437A JP 13222177 A JP13222177 A JP 13222177A JP 13222177 A JP13222177 A JP 13222177A JP S5465437 A JPS5465437 A JP S5465437A
Authority
JP
Japan
Prior art keywords
address
ram13
circuit
rom11
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13222177A
Other languages
Japanese (ja)
Other versions
JPS6012662B2 (en
Inventor
Tomohiro Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP52132221A priority Critical patent/JPS6012662B2/en
Publication of JPS5465437A publication Critical patent/JPS5465437A/en
Publication of JPS6012662B2 publication Critical patent/JPS6012662B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To ensure an addured check for ROM and RAM with addition of a simple check circuit, by writing the test data within each address of RAM via the test flow, designating the address of RAM by the output of ROM and deciding the read-out contents at outside.
CONSTITUTION: The logic circuit carries out the arithmetic control function through the control of ROM11 which memorizes the address of RAM13 plus various instructions. In such logic circuit, the 1st test signal is supplied to input terminal 23a when testing the circuit, and the fixed data is written into RAM13 via ROM11. After this, the 2nd test signal is applied to input terminal 23b, and the normal address control action is inhibited via AND circuit 26 to secure the reading mode. With actuation of gate group 25 and address control part 22, the test address system is actuated, and RAM13 is designated in sequence by the output of ROM11. Then the data read out from RAM13 is applied to deciding circuit 32 to carry out the check for ROM11 and RAM13.
COPYRIGHT: (C)1979,JPO&Japio
JP52132221A 1977-11-04 1977-11-04 ROM/RAM check method Expired JPS6012662B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52132221A JPS6012662B2 (en) 1977-11-04 1977-11-04 ROM/RAM check method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52132221A JPS6012662B2 (en) 1977-11-04 1977-11-04 ROM/RAM check method

Publications (2)

Publication Number Publication Date
JPS5465437A true JPS5465437A (en) 1979-05-26
JPS6012662B2 JPS6012662B2 (en) 1985-04-02

Family

ID=15076211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52132221A Expired JPS6012662B2 (en) 1977-11-04 1977-11-04 ROM/RAM check method

Country Status (1)

Country Link
JP (1) JPS6012662B2 (en)

Also Published As

Publication number Publication date
JPS6012662B2 (en) 1985-04-02

Similar Documents

Publication Publication Date Title
JPS55163697A (en) Memory device
JPS5465436A (en) Rom checking system
JPS56155452A (en) Testing method for large scale integrated circuit device
JPS56149626A (en) Channel device
JPS56168267A (en) Logical device
JPS5720880A (en) Pattern reducing system
JPS5694447A (en) Test system of parity checker
JPS56145600A (en) Detection system for memory destruction
JPS55139699A (en) Error detection system of memory unit
JPS5694453A (en) Test signal generating device
JPS5794995A (en) Memory test system
JPS56168269A (en) Logical device
JPS57127996A (en) Check input data set circuit for shift register constituted logical circuit function testing device
JPS5563445A (en) Diagnosis system
JPS5537634A (en) Integrated-circuit device
JPS5353932A (en) Fault detection system for memory address line
JPS57100536A (en) Data buffer device
JPS55150047A (en) Test unit for information processor
JPS5492136A (en) Memory unit testing system
JPS56121155A (en) Address coincidence detection circuit
JPS6428747A (en) Microprocessor
JPS56155462A (en) Voice output system for electronic register
JPS53145431A (en) Test method for memory
JPS554659A (en) History recording system for data input device
JPS553083A (en) Control system for microprogram