JPS5486256A - Frequency control circuit - Google Patents

Frequency control circuit

Info

Publication number
JPS5486256A
JPS5486256A JP15410777A JP15410777A JPS5486256A JP S5486256 A JPS5486256 A JP S5486256A JP 15410777 A JP15410777 A JP 15410777A JP 15410777 A JP15410777 A JP 15410777A JP S5486256 A JPS5486256 A JP S5486256A
Authority
JP
Japan
Prior art keywords
frequency
assigned
memory
oscillator
time interval
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15410777A
Other languages
Japanese (ja)
Inventor
Hiromoto Yamane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15410777A priority Critical patent/JPS5486256A/en
Publication of JPS5486256A publication Critical patent/JPS5486256A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Superheterodyne Receivers (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To obtain a stable frequency control circuit which suits to frequency control at the time of electronic tuning by making the output of a voltage or current control oscillator agree with a frequency set to an assignment frequency memory. CONSTITUTION:The value of the assigned oscillation frequency is set to assignment frequency memory 16 by a digital signal first. Frequency counter 12, on the other hand, counts the oscillation frequency of voltage control oscillator 11. The contents of counter 12 are compared with those of memory 16 by frequency-value comparator 15. In this case, the comparison is done at a certain time interval and the time interval is assigned by clock pulse generator 17. The comparison result of frequency values is supplied to frequency control signal generator 14 to generate a digital signal for adjustment of the frequency and oscillator 11 is controlled via digital converter 13 to adjust the oscillation frequency. When the oscillation frequency of oscillator 11 agrees with that assigned by memory 16, the output of signal generator 14 becomes constant and then, a slight shift in frequency caused by the drift of the system is supervised and corrected at the time interval assigned by pulse generator 17.
JP15410777A 1977-12-21 1977-12-21 Frequency control circuit Pending JPS5486256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15410777A JPS5486256A (en) 1977-12-21 1977-12-21 Frequency control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15410777A JPS5486256A (en) 1977-12-21 1977-12-21 Frequency control circuit

Publications (1)

Publication Number Publication Date
JPS5486256A true JPS5486256A (en) 1979-07-09

Family

ID=15577066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15410777A Pending JPS5486256A (en) 1977-12-21 1977-12-21 Frequency control circuit

Country Status (1)

Country Link
JP (1) JPS5486256A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167722A (en) * 1983-03-14 1984-09-21 Kokusai Kikai Shindo Kenkyusho:Kk Automatic oscillation controller
JPS6027233A (en) * 1983-07-22 1985-02-12 Matsushita Electric Ind Co Ltd Phase synchronization controller
JPS61174823A (en) * 1985-01-30 1986-08-06 Yaesu Musen Co Ltd Fine adjusting circuit of oscillation frequency
JPS62294331A (en) * 1985-12-03 1987-12-21 Radio Res Lab High speed frequency switching synthesizer
EP1184961A1 (en) * 2000-08-21 2002-03-06 Motorola, Inc. Apparatus and method for reducing noise in a switch mode power management system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167722A (en) * 1983-03-14 1984-09-21 Kokusai Kikai Shindo Kenkyusho:Kk Automatic oscillation controller
JPS6027233A (en) * 1983-07-22 1985-02-12 Matsushita Electric Ind Co Ltd Phase synchronization controller
JPS61174823A (en) * 1985-01-30 1986-08-06 Yaesu Musen Co Ltd Fine adjusting circuit of oscillation frequency
JPS62294331A (en) * 1985-12-03 1987-12-21 Radio Res Lab High speed frequency switching synthesizer
EP1184961A1 (en) * 2000-08-21 2002-03-06 Motorola, Inc. Apparatus and method for reducing noise in a switch mode power management system

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