JPS5535545A - Digital phase synchronous circuit - Google Patents

Digital phase synchronous circuit

Info

Publication number
JPS5535545A
JPS5535545A JP10878078A JP10878078A JPS5535545A JP S5535545 A JPS5535545 A JP S5535545A JP 10878078 A JP10878078 A JP 10878078A JP 10878078 A JP10878078 A JP 10878078A JP S5535545 A JPS5535545 A JP S5535545A
Authority
JP
Japan
Prior art keywords
signal
phase
synchronization
pulse
generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10878078A
Other languages
Japanese (ja)
Other versions
JPS6320051B2 (en
Inventor
Fumiaki Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10878078A priority Critical patent/JPS5535545A/en
Publication of JPS5535545A publication Critical patent/JPS5535545A/en
Publication of JPS6320051B2 publication Critical patent/JPS6320051B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To obtain a stable-operation circuit where a time required for synchronization establishment of a phase synchronous circuit, which is utilized for a receiving unit, etc., of the phase modulation system, is short and phase jitter is small after synchronization establishment. CONSTITUTION:Signal Sc of a frequency N-number times as high as the frequency of input signal Si is oscillated by clock oscillator 3 and is counted by counter 201 in digital control pulse generation circuit 2, and at a certain number time, pulse S2 is inputted to phase comparator 1 to compare pulse S2 and input signal Si in phase, and phase difference signal S3 and polarity signal S4 are generated. Synchronization state discriminator 5 discriminates the synchronization state between signals Si and S2 in response to phase difference signal S3 and supplies the result to correcting signal generator 4 as syncrhonization state signal Ss, and generator 4 supplies correction quantity PR for phase correction of signal S2 to counter 201 in pulse generator 2 on a basis of synchronization state signal Ss and signals S3 and S4 and corrects the phase of signal S2 and performs the control to achieve phase synchronization.
JP10878078A 1978-09-04 1978-09-04 Digital phase synchronous circuit Granted JPS5535545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10878078A JPS5535545A (en) 1978-09-04 1978-09-04 Digital phase synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10878078A JPS5535545A (en) 1978-09-04 1978-09-04 Digital phase synchronous circuit

Publications (2)

Publication Number Publication Date
JPS5535545A true JPS5535545A (en) 1980-03-12
JPS6320051B2 JPS6320051B2 (en) 1988-04-26

Family

ID=14493282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10878078A Granted JPS5535545A (en) 1978-09-04 1978-09-04 Digital phase synchronous circuit

Country Status (1)

Country Link
JP (1) JPS5535545A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713838A (en) * 1980-06-30 1982-01-23 Hitachi Ltd Clock pulse reproduction system
JPS6027251A (en) * 1983-07-25 1985-02-12 Kokusai Electric Co Ltd Controlling method of synchronization in data reception
JPH0267034A (en) * 1988-09-01 1990-03-07 Matsushita Electric Ind Co Ltd bit synchronization circuit
WO1991006166A1 (en) * 1989-10-23 1991-05-02 Nippon Telegraph And Telephone Corporation Digital demodulator
JP2006339858A (en) * 2005-05-31 2006-12-14 Toshiba Corp Data sampling circuit and semiconductor integrated circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163662A (en) * 1978-06-02 1979-12-26 Toyo Communication Equip Digital pll device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163662A (en) * 1978-06-02 1979-12-26 Toyo Communication Equip Digital pll device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713838A (en) * 1980-06-30 1982-01-23 Hitachi Ltd Clock pulse reproduction system
JPS6027251A (en) * 1983-07-25 1985-02-12 Kokusai Electric Co Ltd Controlling method of synchronization in data reception
JPH0267034A (en) * 1988-09-01 1990-03-07 Matsushita Electric Ind Co Ltd bit synchronization circuit
WO1991006166A1 (en) * 1989-10-23 1991-05-02 Nippon Telegraph And Telephone Corporation Digital demodulator
JP2006339858A (en) * 2005-05-31 2006-12-14 Toshiba Corp Data sampling circuit and semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS6320051B2 (en) 1988-04-26

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