JPS5491004A - Data transmission circuit - Google Patents

Data transmission circuit

Info

Publication number
JPS5491004A
JPS5491004A JP15793777A JP15793777A JPS5491004A JP S5491004 A JPS5491004 A JP S5491004A JP 15793777 A JP15793777 A JP 15793777A JP 15793777 A JP15793777 A JP 15793777A JP S5491004 A JPS5491004 A JP S5491004A
Authority
JP
Japan
Prior art keywords
circuit
transmitting
data
clock
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15793777A
Other languages
Japanese (ja)
Inventor
Yoshiro Sakurauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15793777A priority Critical patent/JPS5491004A/en
Publication of JPS5491004A publication Critical patent/JPS5491004A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
    • H04L5/24—Arrangements affording multiple use of the transmission path using time-division multiplexing with start-stop synchronous converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To enable simple hardware to synchronize transmitting signals one another by allowing an interface conversion adaptor device to correct a difference in speed on a character unit by using a data transmission circuit on a start-stop synchronization system. CONSTITUTION:This system is equipped with start-stop synchronization system receiver-transmitter circuit 1 which has receiver circuit 11 supplied with transmitting data from an input-output device to be branched and transmitter circuit 12 supplied with its output, circuit 2 which obtains the transmission timing of the synchronous modem synchronizing to a clock to circuit 1, and circuit 3 which obtains the transmission data of an interface by sampling and latching the start-stop system transmitting data output transmitting bit by transmitting bit using the transmission timing pulse as a sampling clock, thereby absorbing the speed difference between the speed deviation of transmitting data from the input-output device and the speed deviation of the clock of the adaptor on a character unit.
JP15793777A 1977-12-28 1977-12-28 Data transmission circuit Pending JPS5491004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15793777A JPS5491004A (en) 1977-12-28 1977-12-28 Data transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15793777A JPS5491004A (en) 1977-12-28 1977-12-28 Data transmission circuit

Publications (1)

Publication Number Publication Date
JPS5491004A true JPS5491004A (en) 1979-07-19

Family

ID=15660730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15793777A Pending JPS5491004A (en) 1977-12-28 1977-12-28 Data transmission circuit

Country Status (1)

Country Link
JP (1) JPS5491004A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238740A (en) * 1989-03-13 1990-09-21 Fujitsu Ltd Start-stop synchronization adaptor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02238740A (en) * 1989-03-13 1990-09-21 Fujitsu Ltd Start-stop synchronization adaptor

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