JPS55115335A - Method of forming multiistage mesa in semiconductor structure - Google Patents

Method of forming multiistage mesa in semiconductor structure

Info

Publication number
JPS55115335A
JPS55115335A JP1966180A JP1966180A JPS55115335A JP S55115335 A JPS55115335 A JP S55115335A JP 1966180 A JP1966180 A JP 1966180A JP 1966180 A JP1966180 A JP 1966180A JP S55115335 A JPS55115335 A JP S55115335A
Authority
JP
Japan
Prior art keywords
multiistage
mesa
forming
semiconductor structure
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1966180A
Other languages
English (en)
Japanese (ja)
Inventor
Jierarudo Aintohooben Uiremu
Maningu Sabitsuji Neirus Jiyon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of JPS55115335A publication Critical patent/JPS55115335A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/101—Three-dimensional [3D] integrated devices comprising components on opposite major surfaces of semiconductor substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials

Landscapes

  • Bipolar Transistors (AREA)
  • Weting (AREA)
JP1966180A 1979-02-22 1980-02-18 Method of forming multiistage mesa in semiconductor structure Pending JPS55115335A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1414479A 1979-02-22 1979-02-22

Publications (1)

Publication Number Publication Date
JPS55115335A true JPS55115335A (en) 1980-09-05

Family

ID=21763796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1966180A Pending JPS55115335A (en) 1979-02-22 1980-02-18 Method of forming multiistage mesa in semiconductor structure

Country Status (5)

Country Link
JP (1) JPS55115335A (it)
DE (1) DE3005627A1 (it)
FR (1) FR2449971A1 (it)
GB (1) GB2042805A (it)
IT (1) IT1212404B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8624637D0 (en) * 1986-10-14 1986-11-19 Emi Plc Thorn Electrical device
US4996627A (en) * 1989-01-30 1991-02-26 Dresser Industries, Inc. High sensitivity miniature pressure transducer
EP2717314A1 (en) * 2012-10-03 2014-04-09 ABB Technology AG Method of producing a junction termination for a power semiconductor device and corresponding power semiconductor device
FR2998090A1 (fr) * 2013-06-26 2014-05-16 Commissariat Energie Atomique Procede de structuration de surface par modification locale de selectivite a la gravure
FR3030876B1 (fr) * 2014-12-22 2017-12-15 Commissariat Energie Atomique Procede de realisation de motifs
CN120711632A (zh) * 2025-06-07 2025-09-26 东莞市楚钢精密蚀刻技术有限公司 一种多阶梯台阶成型工艺

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL153947B (nl) * 1967-02-25 1977-07-15 Philips Nv Werkwijze voor het vervaardigen van halfgeleiderinrichtingen, waarbij een selectief elektrolytisch etsproces wordt toegepast en halfgeleiderinrichting verkregen met toepassing van de werkwijze.
NL162254B (nl) * 1968-11-29 1979-11-15 Philips Nv Halfgeleiderinrichting voor het omzetten van mechanische spanningen in elektrische signalen en werkwijze voor het vervaardigen daarvan.
GB1211499A (en) * 1969-03-07 1970-11-04 Standard Telephones Cables Ltd A method of manufacturing semiconductor devices
NL180265C (nl) * 1976-06-21 1987-01-16 Gen Electric Halfgeleiderinrichting voor hoge spanning.
JPS5360580A (en) * 1976-11-11 1978-05-31 Nec Corp Etching method of semiconductor material
JPS53120280A (en) * 1977-03-30 1978-10-20 Toshiba Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
GB2042805A (en) 1980-09-24
DE3005627A1 (de) 1980-09-04
IT8019547A0 (it) 1980-01-29
IT1212404B (it) 1989-11-22
FR2449971A1 (fr) 1980-09-19

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