JPS55128954A - Phase deciding device - Google Patents

Phase deciding device

Info

Publication number
JPS55128954A
JPS55128954A JP3620679A JP3620679A JPS55128954A JP S55128954 A JPS55128954 A JP S55128954A JP 3620679 A JP3620679 A JP 3620679A JP 3620679 A JP3620679 A JP 3620679A JP S55128954 A JPS55128954 A JP S55128954A
Authority
JP
Japan
Prior art keywords
signal
absolute value
signals
phase
delivered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3620679A
Other languages
Japanese (ja)
Other versions
JPS6340060B2 (en
Inventor
Kunihiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP3620679A priority Critical patent/JPS55128954A/en
Publication of JPS55128954A publication Critical patent/JPS55128954A/en
Publication of JPS6340060B2 publication Critical patent/JPS6340060B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Measuring Phase Differences (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To realize a phase deciding device featuring a low-cost constitution and with no occurrence of the decision error by providing the circuit which decides the polarities of two orthogonal signals which are obtained through demodulation of the modulated wave plus the circuit which compares the absolute value in the 8- phase PSK MODEM. CONSTITUTION:The 8-phase modulated wave is demodulated at demodulator 13, and demodulation signals x and y which are orthogonal to each other are delivered. Signals x and y are then supplied to signal polarity deciders 10 and 11, and signal D0 or D1 is delivered with logic 1 or 0 in accordance with the positive or negative polarity. Signals x and y are also supplied to full-wave rectifiers 8 and 7 to deliver the absolute value of x and y, and then the comparison is given between the absolute value of x and y through the comparator consisting of subtractor 9 and polarity decider 12. And based on the scale of the absolute value, signal D2 of logic 1 and logic 0 is delivered. Then either one of signal points Q0-Q7 is decided in the signal point arrangement plan via the combination of the output value of deciders 10-12. In such way, a phase deciding device which is free from decision error can be obtained with no high-cost multiplier required.
JP3620679A 1979-03-29 1979-03-29 Phase deciding device Granted JPS55128954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3620679A JPS55128954A (en) 1979-03-29 1979-03-29 Phase deciding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3620679A JPS55128954A (en) 1979-03-29 1979-03-29 Phase deciding device

Publications (2)

Publication Number Publication Date
JPS55128954A true JPS55128954A (en) 1980-10-06
JPS6340060B2 JPS6340060B2 (en) 1988-08-09

Family

ID=12463260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3620679A Granted JPS55128954A (en) 1979-03-29 1979-03-29 Phase deciding device

Country Status (1)

Country Link
JP (1) JPS55128954A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002069592A1 (en) * 2001-02-27 2002-09-06 Matsushita Electric Industrial Co., Ltd. Decoder and decoding method
US6621332B2 (en) 2001-04-26 2003-09-16 Mitsubishi Denki Kabushiki Kaisha Demodulator and demodulation method of DQPSK system with reduced circuit scale
WO2011016205A1 (en) * 2009-08-05 2011-02-10 パナソニック株式会社 Receiving device and receiving method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51142256A (en) * 1975-06-03 1976-12-07 Nippon Telegr & Teleph Corp <Ntt> Phase-discrimination circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51142256A (en) * 1975-06-03 1976-12-07 Nippon Telegr & Teleph Corp <Ntt> Phase-discrimination circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002069592A1 (en) * 2001-02-27 2002-09-06 Matsushita Electric Industrial Co., Ltd. Decoder and decoding method
US6621332B2 (en) 2001-04-26 2003-09-16 Mitsubishi Denki Kabushiki Kaisha Demodulator and demodulation method of DQPSK system with reduced circuit scale
WO2011016205A1 (en) * 2009-08-05 2011-02-10 パナソニック株式会社 Receiving device and receiving method

Also Published As

Publication number Publication date
JPS6340060B2 (en) 1988-08-09

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