JPS553020A - Microprogram control system - Google Patents
Microprogram control systemInfo
- Publication number
- JPS553020A JPS553020A JP7459078A JP7459078A JPS553020A JP S553020 A JPS553020 A JP S553020A JP 7459078 A JP7459078 A JP 7459078A JP 7459078 A JP7459078 A JP 7459078A JP S553020 A JPS553020 A JP S553020A
- Authority
- JP
- Japan
- Prior art keywords
- cycle
- waveform
- clk
- control
- microinstruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To increase the process speed of the control unit by controlling both the cycle and the waveform of the clocking pulse by the microprogram itself and then producing the CP of the cycle waveform suited to the process contents of each microinstruction.
CONSTITUTION: The address is given from program sequencer 3, and the microinstruction is read out of memory 4 in synchronization with clocking pulse CLKOUT to be set to register 5. The cycle/waveform controlling field of the CLK is provided to the instruction itself, and this part is decoded to obtain each type of control signal CONT for the control of the gate of each part. Part of the control signals are turned to control signal nC of the n-bit width. Reference oscillation output 1 is supplied to reference oscillation division control circuit/CLK production circuit 2, along with signal nC which rescribes the CLK cycle/waveform required for the instruction of under execution. In such constitution, the quick shifting is secured between the program step processes.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7459078A JPS553020A (en) | 1978-06-20 | 1978-06-20 | Microprogram control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7459078A JPS553020A (en) | 1978-06-20 | 1978-06-20 | Microprogram control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS553020A true JPS553020A (en) | 1980-01-10 |
Family
ID=13551520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7459078A Pending JPS553020A (en) | 1978-06-20 | 1978-06-20 | Microprogram control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS553020A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02123449A (en) * | 1988-10-14 | 1990-05-10 | Internatl Business Mach Corp <Ibm> | Computer system having clock speed interrupted and interrupt control thereof |
| JPH03214205A (en) * | 1990-01-18 | 1991-09-19 | Keyence Corp | Sequence controller |
| US10220957B2 (en) | 2015-02-20 | 2019-03-05 | Airbus Operations Limited | Two part cap |
-
1978
- 1978-06-20 JP JP7459078A patent/JPS553020A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02123449A (en) * | 1988-10-14 | 1990-05-10 | Internatl Business Mach Corp <Ibm> | Computer system having clock speed interrupted and interrupt control thereof |
| JPH03214205A (en) * | 1990-01-18 | 1991-09-19 | Keyence Corp | Sequence controller |
| US10220957B2 (en) | 2015-02-20 | 2019-03-05 | Airbus Operations Limited | Two part cap |
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