JPS5533213A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS5533213A
JPS5533213A JP10551078A JP10551078A JPS5533213A JP S5533213 A JPS5533213 A JP S5533213A JP 10551078 A JP10551078 A JP 10551078A JP 10551078 A JP10551078 A JP 10551078A JP S5533213 A JPS5533213 A JP S5533213A
Authority
JP
Japan
Prior art keywords
bus
unit
cycle
group
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10551078A
Other languages
Japanese (ja)
Other versions
JPS6229829B2 (en
Inventor
Noboru Ichiura
Yoshihisa Oota
Tatsutoshi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP10551078A priority Critical patent/JPS5533213A/en
Publication of JPS5533213A publication Critical patent/JPS5533213A/en
Publication of JPS6229829B2 publication Critical patent/JPS6229829B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE: To make the most of the transfer performance of a bus line by using three kind of synchronous bus cycles to perform information transfer via the bus.
CONSTITUTION: In the 1st cycle, a signal for a request for a right to use is sent from each group of CPU2, memory unit 3, etc., to bus controller 5 at synchronous timing. Bus controller 5 sends a signal for a permit to use the bus to a group with top priority to decide on a unit to be connected to the bus by a dizzy chain in the group. In the 2nd cycle, discrimination number 10 for a transmitting unit, discrimination number 11 for a receiving unit, control information 12, and data are sent out synchronously. Each unit is assigned by slave number 11 and receives them when ready to receive. In the 3rd cycle, a reception confirmative signal is sent out. Various cycles are simultaneously carried out in sequences of S, T and R.
COPYRIGHT: (C)1980,JPO&Japio
JP10551078A 1978-08-31 1978-08-31 Information processing system Granted JPS5533213A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10551078A JPS5533213A (en) 1978-08-31 1978-08-31 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10551078A JPS5533213A (en) 1978-08-31 1978-08-31 Information processing system

Publications (2)

Publication Number Publication Date
JPS5533213A true JPS5533213A (en) 1980-03-08
JPS6229829B2 JPS6229829B2 (en) 1987-06-29

Family

ID=14409589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10551078A Granted JPS5533213A (en) 1978-08-31 1978-08-31 Information processing system

Country Status (1)

Country Link
JP (1) JPS5533213A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56161740A (en) * 1980-05-15 1981-12-12 Nec Corp Determining system for right of usage of bus
JPS58137056A (en) * 1981-10-01 1983-08-15 ストレイタス・コンピユ−タ・インコ−ポレイテツド Digital data processor with fault tolerant bus protocol
JPS58159126A (en) * 1982-03-17 1983-09-21 Nec Corp Data processing system
JPS60159961A (en) * 1984-01-31 1985-08-21 Toshiba Corp Bus command confirming system between devices connected onto bus
JPS61127249A (en) * 1984-11-26 1986-06-14 Nec Corp Data transfer system
JPS6318432A (en) * 1986-07-10 1988-01-26 Toshiba Corp Information retrieval device
JPH01321543A (en) * 1988-06-23 1989-12-27 Matsushita Electric Ind Co Ltd Bus data transfer method and bus data transfer circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5127974U (en) * 1974-08-22 1976-02-28
JPS5414646A (en) * 1977-07-05 1979-02-03 Ibm Adapter unit
JPS54101233A (en) * 1978-01-05 1979-08-09 Honeywell Inf Systems Multiple reading bus cycle operation system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5127974U (en) * 1974-08-22 1976-02-28
JPS5414646A (en) * 1977-07-05 1979-02-03 Ibm Adapter unit
JPS54101233A (en) * 1978-01-05 1979-08-09 Honeywell Inf Systems Multiple reading bus cycle operation system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56161740A (en) * 1980-05-15 1981-12-12 Nec Corp Determining system for right of usage of bus
JPS58137056A (en) * 1981-10-01 1983-08-15 ストレイタス・コンピユ−タ・インコ−ポレイテツド Digital data processor with fault tolerant bus protocol
JPS58159126A (en) * 1982-03-17 1983-09-21 Nec Corp Data processing system
JPS60159961A (en) * 1984-01-31 1985-08-21 Toshiba Corp Bus command confirming system between devices connected onto bus
JPS61127249A (en) * 1984-11-26 1986-06-14 Nec Corp Data transfer system
JPS6318432A (en) * 1986-07-10 1988-01-26 Toshiba Corp Information retrieval device
JPH01321543A (en) * 1988-06-23 1989-12-27 Matsushita Electric Ind Co Ltd Bus data transfer method and bus data transfer circuit

Also Published As

Publication number Publication date
JPS6229829B2 (en) 1987-06-29

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