JPS553642A - Manufacturing semiconductor device - Google Patents

Manufacturing semiconductor device

Info

Publication number
JPS553642A
JPS553642A JP7537778A JP7537778A JPS553642A JP S553642 A JPS553642 A JP S553642A JP 7537778 A JP7537778 A JP 7537778A JP 7537778 A JP7537778 A JP 7537778A JP S553642 A JPS553642 A JP S553642A
Authority
JP
Japan
Prior art keywords
lead
leads
frame
lead frame
solders
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7537778A
Other languages
Japanese (ja)
Inventor
Fumihito Inoue
Kazuo Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7537778A priority Critical patent/JPS553642A/en
Publication of JPS553642A publication Critical patent/JPS553642A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate the Ag migration problem and secure an excellent connecting property of solders by covering Al on a lead frame, and by removing A l from the surfaces of the protruded leads after forming semiconductor elements and sealing them by insulators. CONSTITUTION:An Al cover 2 is formed on the surface of a plate material 1 of phosphor bronze and the like. Then, a continuous lead frame body 3 having a plurality of lead-frame patterns are made. After that, a semiconductor element 4 is formed on the Al formation of the lead frame. Then, the semiconductor element and inner leads are molded by epoxy resin 5 and the like in such a way they are enclosed. Thereafter, the continuous frame is cut into individual units, unnecessary portions between the leads are removed, and leads 6 are bent in one direction. Then Al on the lead surface protruded from the mask of the resinous seal 5 is removed. As a result Ag migration problem is eliminated by forming the Al film on the bonding portion, and excellent connecting property of solders at the lead portion is secured.
JP7537778A 1978-06-23 1978-06-23 Manufacturing semiconductor device Pending JPS553642A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7537778A JPS553642A (en) 1978-06-23 1978-06-23 Manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7537778A JPS553642A (en) 1978-06-23 1978-06-23 Manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPS553642A true JPS553642A (en) 1980-01-11

Family

ID=13574441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7537778A Pending JPS553642A (en) 1978-06-23 1978-06-23 Manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS553642A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799763A (en) * 1980-12-12 1982-06-21 Hitachi Cable Ltd Manufacture of lead frame for integrated circuit
JPS5925257A (en) * 1982-07-30 1984-02-09 Shinko Electric Ind Co Ltd Manufacture of lead frame for low melting-point glass seal type semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112273A (en) * 1975-03-28 1976-10-04 Hitachi Ltd Lead frame for resin mold type semiconductor device
JPS51137375A (en) * 1975-05-22 1976-11-27 Mitsubishi Electric Corp Semi conductor device
JPS5464467A (en) * 1977-10-31 1979-05-24 Nippon Paint Co Ltd Electronic part

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112273A (en) * 1975-03-28 1976-10-04 Hitachi Ltd Lead frame for resin mold type semiconductor device
JPS51137375A (en) * 1975-05-22 1976-11-27 Mitsubishi Electric Corp Semi conductor device
JPS5464467A (en) * 1977-10-31 1979-05-24 Nippon Paint Co Ltd Electronic part

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799763A (en) * 1980-12-12 1982-06-21 Hitachi Cable Ltd Manufacture of lead frame for integrated circuit
JPS5925257A (en) * 1982-07-30 1984-02-09 Shinko Electric Ind Co Ltd Manufacture of lead frame for low melting-point glass seal type semiconductor device

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