JPS5539609A - Semiconductor integrated circuit device and production of the same - Google Patents

Semiconductor integrated circuit device and production of the same

Info

Publication number
JPS5539609A
JPS5539609A JP11172178A JP11172178A JPS5539609A JP S5539609 A JPS5539609 A JP S5539609A JP 11172178 A JP11172178 A JP 11172178A JP 11172178 A JP11172178 A JP 11172178A JP S5539609 A JPS5539609 A JP S5539609A
Authority
JP
Japan
Prior art keywords
mnos
gate
selectively
coated
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11172178A
Other languages
Japanese (ja)
Inventor
Shinji Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11172178A priority Critical patent/JPS5539609A/en
Publication of JPS5539609A publication Critical patent/JPS5539609A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83135—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having different gate conductor materials or different gate conductor implants

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To provide non-volatile memories on a chip formed through Si gate process with ease and no deterioration by utilizing Al wiring of Si gate structure as a gate electrode for each non-volatile memory MNOS and extending the Si3N4 film over the circuit element of other Si gate structure. CONSTITUTION:Formation of source and drain layers and separation of channel region for each MNOS element is carried out with use of a mask 10. After making openings selectively on insulation film subsequently coated, an SiO2 film 15 of approx. 500Angstrom thickness is coated and then an opening 16 is selectively made at the gate region for an MNOS element. SiO220 of approx. 100Angstrom thickness is coated selectively and then Si3N421 is stacked thereon. After making openings on the film 21 selectively, N-channel MNOS are formed in C-MOS Si gates process at the same time. With this method, each non-volatile memory will not cause the deterioration in characteristic of holding even through the heat treatment of Si gate process and each MNOS element can be easily formed on the same chip simultaneously.
JP11172178A 1978-09-13 1978-09-13 Semiconductor integrated circuit device and production of the same Pending JPS5539609A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11172178A JPS5539609A (en) 1978-09-13 1978-09-13 Semiconductor integrated circuit device and production of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11172178A JPS5539609A (en) 1978-09-13 1978-09-13 Semiconductor integrated circuit device and production of the same

Related Child Applications (4)

Application Number Title Priority Date Filing Date
JP61263703A Division JPS62115779A (en) 1986-11-07 1986-11-07 Manufacture of semiconductor integrated circuit device
JP61263702A Division JPS62115778A (en) 1986-11-07 1986-11-07 Semiconductor integrated circuit device
JP62199710A Division JPS6399575A (en) 1987-08-12 1987-08-12 Manufacturing method for semiconductor integrated circuit devices
JP63224612A Division JPH02359A (en) 1988-09-09 1988-09-09 Method for manufacturing semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5539609A true JPS5539609A (en) 1980-03-19

Family

ID=14568473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11172178A Pending JPS5539609A (en) 1978-09-13 1978-09-13 Semiconductor integrated circuit device and production of the same

Country Status (1)

Country Link
JP (1) JPS5539609A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439070A (en) * 1987-08-04 1989-02-09 Nec Corp Nonvolatile semiconductor storage device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099276A (en) * 1973-12-28 1975-08-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099276A (en) * 1973-12-28 1975-08-06

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439070A (en) * 1987-08-04 1989-02-09 Nec Corp Nonvolatile semiconductor storage device

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