JPS5539901A - Integrating multiplication system of digital differential analyzer - Google Patents

Integrating multiplication system of digital differential analyzer

Info

Publication number
JPS5539901A
JPS5539901A JP9611978A JP9611978A JPS5539901A JP S5539901 A JPS5539901 A JP S5539901A JP 9611978 A JP9611978 A JP 9611978A JP 9611978 A JP9611978 A JP 9611978A JP S5539901 A JPS5539901 A JP S5539901A
Authority
JP
Japan
Prior art keywords
memory
integrating
differential analyzer
digital differential
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9611978A
Other languages
Japanese (ja)
Inventor
Yasuhiro Hamaguchi
Akio Jo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Denki Electric Inc
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP9611978A priority Critical patent/JPS5539901A/en
Publication of JPS5539901A publication Critical patent/JPS5539901A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To carry out the integrating and multiplication with high speed and high accuracy by performing the data access between the adding and the integrating results through the memory.
CONSTITUTION: In the digital differential analyzer (DDA), the operation follows the division quadrature. In the case that the differential analyzer operates as an integrating multiplier, the connection memory MC4 is used for generating the indent of ΔX of x. The content of ΔZ memory MZ1WMZ4 read out in accordance with the address command from the connection memory MC1WMC4 represents the increment of the operation results in the preceding operation and comprises one bit indicating the positive and negative and one bit indicating 1 in number or 0. ΔZ memory is written the operation result therein, and used by reading out the content of ΔZ memory as operation input to the integrating multiplier, and the data access between the respective operation elements through ΔZ memory is carried out.
COPYRIGHT: (C)1980,JPO&Japio
JP9611978A 1978-08-09 1978-08-09 Integrating multiplication system of digital differential analyzer Pending JPS5539901A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9611978A JPS5539901A (en) 1978-08-09 1978-08-09 Integrating multiplication system of digital differential analyzer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9611978A JPS5539901A (en) 1978-08-09 1978-08-09 Integrating multiplication system of digital differential analyzer

Publications (1)

Publication Number Publication Date
JPS5539901A true JPS5539901A (en) 1980-03-21

Family

ID=14156486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9611978A Pending JPS5539901A (en) 1978-08-09 1978-08-09 Integrating multiplication system of digital differential analyzer

Country Status (1)

Country Link
JP (1) JPS5539901A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57132659A (en) * 1981-02-10 1982-08-17 Nippon Telegr & Teleph Corp <Ntt> Ion implantation apparatus
JPS58214261A (en) * 1982-05-24 1983-12-13 バリアン・アソシエイツ・インコ−ポレイテツド Wafer orienting device
JPS62157150U (en) * 1986-03-26 1987-10-06

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57132659A (en) * 1981-02-10 1982-08-17 Nippon Telegr & Teleph Corp <Ntt> Ion implantation apparatus
JPS58214261A (en) * 1982-05-24 1983-12-13 バリアン・アソシエイツ・インコ−ポレイテツド Wafer orienting device
JPS62157150U (en) * 1986-03-26 1987-10-06

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