JPS554611A - System initialization system - Google Patents

System initialization system

Info

Publication number
JPS554611A
JPS554611A JP7648278A JP7648278A JPS554611A JP S554611 A JPS554611 A JP S554611A JP 7648278 A JP7648278 A JP 7648278A JP 7648278 A JP7648278 A JP 7648278A JP S554611 A JPS554611 A JP S554611A
Authority
JP
Japan
Prior art keywords
circuit
output
executed
request
system initialization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7648278A
Other languages
Japanese (ja)
Inventor
Akira Kikuchi
Shunji Hiraki
Nobuo Shibazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7648278A priority Critical patent/JPS554611A/en
Publication of JPS554611A publication Critical patent/JPS554611A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Clocks (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To reduce components in number and also to prevent malfunction by generating a system initialization signal on detecting that a fixed information process is not executed after a start signal is inputted.
CONSTITUTION: While digital control circuit 4 is unable to operate normally, the execution of a program is impossible even if a corresponding start request arrives from time base circuit 1, and FF circuit 5 is set by the output of start circuit 3, but not reset, thereby holding output Q at level "1". Therefore, when the next operation request is sent from circuit 1, logic circuit G detects that the preceding request has not been executed. Namely, when the operation equivalent to the preceding operation request is not executed, the output of circuit 5 is made "1" and the time base output is "1"; and constituting circuit G by an AND circuit makes its output "1", so that it can be used as a system initialization signal.
COPYRIGHT: (C)1980,JPO&Japio
JP7648278A 1978-06-26 1978-06-26 System initialization system Pending JPS554611A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7648278A JPS554611A (en) 1978-06-26 1978-06-26 System initialization system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7648278A JPS554611A (en) 1978-06-26 1978-06-26 System initialization system

Publications (1)

Publication Number Publication Date
JPS554611A true JPS554611A (en) 1980-01-14

Family

ID=13606407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7648278A Pending JPS554611A (en) 1978-06-26 1978-06-26 System initialization system

Country Status (1)

Country Link
JP (1) JPS554611A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04294712A (en) * 1991-03-22 1992-10-19 Sekisui Jushi Co Ltd Melting method for hot plate for synthetic resin band

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04294712A (en) * 1991-03-22 1992-10-19 Sekisui Jushi Co Ltd Melting method for hot plate for synthetic resin band

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