JPS5553441A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5553441A JPS5553441A JP12642678A JP12642678A JPS5553441A JP S5553441 A JPS5553441 A JP S5553441A JP 12642678 A JP12642678 A JP 12642678A JP 12642678 A JP12642678 A JP 12642678A JP S5553441 A JPS5553441 A JP S5553441A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- pattern
- wiring pattern
- region
- openings
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
- H10W72/07553—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/934—Cross-sectional shape, i.e. in side view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/981—Auxiliary members, e.g. spacers
- H10W72/983—Reinforcing structures, e.g. collars
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE: To increase the integration density of a circuit by placing the second wiring pattern or the first wiring pattern located below the bonding portion of a lead wire and forming a multi-layer construction.
CONSTITUTION: A SiO2 layer 13 is made to adhere to a p-type Si substarte 11 where a n-type diffused region 12 has been formed, and an opening 13a is made on the region 12. Next evaporated Al is put on the layer 13 which is etched by means of photoetching so that the first wiring pattern 14 is formed at a right angle to the cross section of the figure, with reinforcing metal leayers 15a and 15b sandwiching the pattern. One 15b of the metal layers is ohmically contacted with the region 12 through the opening 13a. Then the whole surface is coated with an insulating layer 16 made of polyimide resin where openings 16a and 16b are made. The second wiring pattern 17, or a upper layer while leading it over these openings is provided at a right angle to the pattern 14 and made to contact the layer 15b. Next a lead wire 19 is bonded on the pattern 17. By so doing, the wiring patterns 14 and 17 are made to cross each other and piled one after the other.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12642678A JPS5553441A (en) | 1978-10-14 | 1978-10-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12642678A JPS5553441A (en) | 1978-10-14 | 1978-10-14 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5553441A true JPS5553441A (en) | 1980-04-18 |
| JPS612297B2 JPS612297B2 (en) | 1986-01-23 |
Family
ID=14934878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12642678A Granted JPS5553441A (en) | 1978-10-14 | 1978-10-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5553441A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5812949U (en) * | 1981-07-20 | 1983-01-27 | 三洋電機株式会社 | Multilayer wiring structure of semiconductor integrated circuits |
| JPS5852854A (en) * | 1981-09-24 | 1983-03-29 | Nec Corp | Semiconductor device |
| JPS63283040A (en) * | 1987-05-15 | 1988-11-18 | Toshiba Corp | Semiconductor device |
| USRE40819E1 (en) | 1995-12-21 | 2009-07-07 | Micron Technology, Inc. | Semiconductor device with improved bond pads |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02146381A (en) * | 1988-11-25 | 1990-06-05 | Matsushita Electric Ind Co Ltd | fluid control valve |
-
1978
- 1978-10-14 JP JP12642678A patent/JPS5553441A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5812949U (en) * | 1981-07-20 | 1983-01-27 | 三洋電機株式会社 | Multilayer wiring structure of semiconductor integrated circuits |
| JPS5852854A (en) * | 1981-09-24 | 1983-03-29 | Nec Corp | Semiconductor device |
| JPS63283040A (en) * | 1987-05-15 | 1988-11-18 | Toshiba Corp | Semiconductor device |
| USRE40819E1 (en) | 1995-12-21 | 2009-07-07 | Micron Technology, Inc. | Semiconductor device with improved bond pads |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS612297B2 (en) | 1986-01-23 |
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