JPS6489343A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6489343A JPS6489343A JP24716787A JP24716787A JPS6489343A JP S6489343 A JPS6489343 A JP S6489343A JP 24716787 A JP24716787 A JP 24716787A JP 24716787 A JP24716787 A JP 24716787A JP S6489343 A JPS6489343 A JP S6489343A
- Authority
- JP
- Japan
- Prior art keywords
- film
- upper layer
- hole
- layer wirings
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000010410 layer Substances 0.000 abstract 8
- 239000002184 metal Substances 0.000 abstract 7
- 239000011229 interlayer Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 1
Landscapes
- Photosensitive Polymer And Photoresist Processing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To improve the coverage of upper layer wirings in a through hole without necessity of shrink-fitting by employing the same metal film as that of upper layer wirings as a mask when a through hole is opened in an interlayer insulating film. CONSTITUTION:Lower layer wirings 3 are formed through a thin insulating film 2 on a semiconductor substrate 1. Then, an interlayer insulating film 4 is formed on the whole surface, a first metal film made of the same metal as that of upper layer wirings is further deposited thereon, an opening 5 is formed, and a mask 6 for a through hole is formed. Thereafter, with the mask 6 a through hole 7 is formed in the film 4. Then, a second metal film 8 is formed on the whole surface. Subsequently, the film 8 and the metal film used as the mask 6 under the film 8 are patterned, thereby forming upper layer wirings 10 made of the film 8 and the first metal film. According to this manufacturing method, since there is no moisture, shrink-fitting is not required, and since the same metal film as that of the upper layer wirings is formed on the periphery of the through hole at the side of the upper layer wirings, the coverage of the upper layer wiring in the through hole is improved.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24716787A JPS6489343A (en) | 1987-09-29 | 1987-09-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24716787A JPS6489343A (en) | 1987-09-29 | 1987-09-29 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6489343A true JPS6489343A (en) | 1989-04-03 |
Family
ID=17159435
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24716787A Pending JPS6489343A (en) | 1987-09-29 | 1987-09-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6489343A (en) |
-
1987
- 1987-09-29 JP JP24716787A patent/JPS6489343A/en active Pending
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