JPS555565A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS555565A JPS555565A JP7900078A JP7900078A JPS555565A JP S555565 A JPS555565 A JP S555565A JP 7900078 A JP7900078 A JP 7900078A JP 7900078 A JP7900078 A JP 7900078A JP S555565 A JPS555565 A JP S555565A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- transistors
- vin
- mos transistors
- vtp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To establish the semiconductor integrated circuit suitable for large scale integration, by making greater the difference between the transition voltages, through the constitution of two P-MOS transistors and two N-MOS transistors. CONSTITUTION:When the input voltage V1N is not greater than VTH(transition voltage), P-MOS transistors Q1, Q3 are conductive and N-MOS transistors Q2, Q4 are non-conductive, and the terminals N4, N5 are both at high voltage. At VTH<= VIN<=¦VDD-VTP¦ (threshold voltage), since the transistors Q3, Q4 are of high resistance, the terminal N5 is inverted to low voltage, and the terminal N4 keeps high voltage. On the other hand, at VDD-¦VTP¦<=VIN, the transistors Q1, Q3 are at OFF state and the transistors Q2, Q4 are ON state, and the terminals N4, N5 are both at low voltage. Accordingly, the transition of the output terminal of the latch circuit constituted with the two input NAND gates NG3, NG4 is taken place at VIN<=VDD- ¦VTP¦ and VIN<=VTN.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7900078A JPS5928292B2 (en) | 1978-06-28 | 1978-06-28 | semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7900078A JPS5928292B2 (en) | 1978-06-28 | 1978-06-28 | semiconductor integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS555565A true JPS555565A (en) | 1980-01-16 |
| JPS5928292B2 JPS5928292B2 (en) | 1984-07-12 |
Family
ID=13677628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7900078A Expired JPS5928292B2 (en) | 1978-06-28 | 1978-06-28 | semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5928292B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586903A (en) * | 1981-07-07 | 1983-01-14 | Hitachi Cable Ltd | Manufacture of sponge-like copper material |
-
1978
- 1978-06-28 JP JP7900078A patent/JPS5928292B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586903A (en) * | 1981-07-07 | 1983-01-14 | Hitachi Cable Ltd | Manufacture of sponge-like copper material |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5928292B2 (en) | 1984-07-12 |
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