JPS5559545A - Electronic computer - Google Patents

Electronic computer

Info

Publication number
JPS5559545A
JPS5559545A JP13405978A JP13405978A JPS5559545A JP S5559545 A JPS5559545 A JP S5559545A JP 13405978 A JP13405978 A JP 13405978A JP 13405978 A JP13405978 A JP 13405978A JP S5559545 A JPS5559545 A JP S5559545A
Authority
JP
Japan
Prior art keywords
order information
switch
register
give
order
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13405978A
Other languages
Japanese (ja)
Inventor
Akira Nagano
Kazuaki Urasaki
Kenji Yoshimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP13405978A priority Critical patent/JPS5559545A/en
Publication of JPS5559545A publication Critical patent/JPS5559545A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To secure an easy input of the order information from outside by making the program memory means memorize previously the switch order information which gives a switch between the existing order information and the order information supplied from outside.
CONSTITUTION: The order information to give the previous order information to the external equipment, the switch order information to give a switch between switching gates 31W38 and the register reading order information to store the external order information set through pin board 4 into register 7 are memorized in ROM1. The switch order information is led out through advancing of program counter 2 and then given to order register 8 via gates 31W38. Then the register reading order is led out. The switch order information is decoded through order decoder 9 to give a switch to gates 31W38, and thus advances counter 5 to give inhibition to the advance of counter 2. The order information sent from board 4 and stored in register 7 is stored in register 8 via gates 31W38 and then decoded by decoder 9 to give the control to the external equipment.
COPYRIGHT: (C)1980,JPO&Japio
JP13405978A 1978-10-30 1978-10-30 Electronic computer Pending JPS5559545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13405978A JPS5559545A (en) 1978-10-30 1978-10-30 Electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13405978A JPS5559545A (en) 1978-10-30 1978-10-30 Electronic computer

Publications (1)

Publication Number Publication Date
JPS5559545A true JPS5559545A (en) 1980-05-06

Family

ID=15119395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13405978A Pending JPS5559545A (en) 1978-10-30 1978-10-30 Electronic computer

Country Status (1)

Country Link
JP (1) JPS5559545A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57121745A (en) * 1981-01-22 1982-07-29 Nec Corp Microprogram control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57121745A (en) * 1981-01-22 1982-07-29 Nec Corp Microprogram control device

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