JPS5568665A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS5568665A
JPS5568665A JP14095778A JP14095778A JPS5568665A JP S5568665 A JPS5568665 A JP S5568665A JP 14095778 A JP14095778 A JP 14095778A JP 14095778 A JP14095778 A JP 14095778A JP S5568665 A JPS5568665 A JP S5568665A
Authority
JP
Japan
Prior art keywords
lead wire
brazing filler
retainer
semiconductor device
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14095778A
Other languages
Japanese (ja)
Inventor
Kazutoyo Narita
Tadashi Sakagami
Noboru Kawasaki
Motoji Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Minebea Power Semiconductor Device Inc
Original Assignee
Hitachi Ltd
Hitachi Haramachi Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Haramachi Electronics Ltd filed Critical Hitachi Ltd
Priority to JP14095778A priority Critical patent/JPS5568665A/en
Publication of JPS5568665A publication Critical patent/JPS5568665A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: To extend the life of a semiconductor device by connecting a terminal retainer after heating only the terminal retainer and fixing the terminal retainer to a heat dissipating electrode plate so that compression force is applied to a semiconductor pellet when operating the semiconductor device.
CONSTITUTION: A semiconductor pellet 2 and a lead wire 3 are connected through brazing filler 4 to a copper or iron heat dissipating electrode plate 1, and the lead wire 3 is connected at its end to a terminal plate 7 secured by insulating resin terminal retainer 6 with brazing filler 9. The brazing filler between the pellet 2 and the lead wire 3 and the brazing filler 4 between the pellet 2 and the electrode plate 1 are affected by shearing strain and tension or compression load in response to the difference of the thermal expansion coefficients among the materials to thereby finally cause them to be broken due to fatigue in their heat cycle. After the terminal plate 7 is fixed to the retainer 6, it is heated and connected to the lead wire 3 in the state that the retainer is extended. When it is cooled, it is contracted to its original length to thereby cause the compression force to be applied to the brazing filler so as to always apply the compression force to the lead wire side to prevent the semiconductor device from braking due to fatigue.
COPYRIGHT: (C)1980,JPO&Japio
JP14095778A 1978-11-17 1978-11-17 Method of fabricating semiconductor device Pending JPS5568665A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14095778A JPS5568665A (en) 1978-11-17 1978-11-17 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14095778A JPS5568665A (en) 1978-11-17 1978-11-17 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS5568665A true JPS5568665A (en) 1980-05-23

Family

ID=15280741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14095778A Pending JPS5568665A (en) 1978-11-17 1978-11-17 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS5568665A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5721867A (en) * 1980-06-02 1982-02-04 Xerox Corp Planar thin film transistor array and method of producing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5721867A (en) * 1980-06-02 1982-02-04 Xerox Corp Planar thin film transistor array and method of producing same

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