JPS5571390A - Clock stabilizing circuit - Google Patents
Clock stabilizing circuitInfo
- Publication number
- JPS5571390A JPS5571390A JP14415678A JP14415678A JPS5571390A JP S5571390 A JPS5571390 A JP S5571390A JP 14415678 A JP14415678 A JP 14415678A JP 14415678 A JP14415678 A JP 14415678A JP S5571390 A JPS5571390 A JP S5571390A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signals
- synchronizing signals
- clock
- repeated frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Color Television Systems (AREA)
Abstract
PURPOSE: To improve precision of a repeated frequency by comparing a waveform, which is obtained by using clocks to sample synchronizing signals of picture signals, and a waveform, which is obtained by delaying the waveform above, with each other in phase and feeding back the comparison result to a clock generator.
CONSTITUTION: Picture signals pass from input terminal 1 through synchronizing separator circuit 2 and have only synchronizing signals extracted, and one of synchronizing signals and the other are transmitted to memory 3 and phase comparator circuit 4 respectively. Synchronizing signals delayed by memory 3 are inputted to circuit 4 also and have the phase compared with the phase of snychronizing signals which are not delayed, and the comparison result is fed back to clock generator 5. Here, a time when periodicity of synchronizing signals exists is selected as the delay time. Now, in case of clock repeated frequency f>ideal repeated frequency f0, delay time T<set delay time T0 is true, and then, circuit 4 detects advance of synchronizing signals which passed through memory 3 and controls so that the clock repeated frequency may be lower. Otherwise, in case of f<f0, T>T0 is ture, and then, circuit 4 controls so that the clock repeated frequency may be higher.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53144156A JPS5919668B2 (en) | 1978-11-24 | 1978-11-24 | clock stabilization circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53144156A JPS5919668B2 (en) | 1978-11-24 | 1978-11-24 | clock stabilization circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5571390A true JPS5571390A (en) | 1980-05-29 |
| JPS5919668B2 JPS5919668B2 (en) | 1984-05-08 |
Family
ID=15355497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53144156A Expired JPS5919668B2 (en) | 1978-11-24 | 1978-11-24 | clock stabilization circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5919668B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58164391A (en) * | 1982-03-05 | 1983-09-29 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Digital color television signal processing circuit |
| JPS5933989A (en) * | 1982-08-20 | 1984-02-24 | Nec Corp | Sample phase controlling system |
| US5465642A (en) * | 1993-12-30 | 1995-11-14 | Gotoh Gut Yugen Kaisha | Neck straightener for stringed instrument |
-
1978
- 1978-11-24 JP JP53144156A patent/JPS5919668B2/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58164391A (en) * | 1982-03-05 | 1983-09-29 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | Digital color television signal processing circuit |
| JPS5933989A (en) * | 1982-08-20 | 1984-02-24 | Nec Corp | Sample phase controlling system |
| US5465642A (en) * | 1993-12-30 | 1995-11-14 | Gotoh Gut Yugen Kaisha | Neck straightener for stringed instrument |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5919668B2 (en) | 1984-05-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5586281A (en) | Synchronizing signal generator on pal system | |
| JPS5563123A (en) | Phase control circuit | |
| JPS56160175A (en) | Synchronous signal generator | |
| JPS5575343A (en) | Phase comparator circuit | |
| JPS5614727A (en) | Phase comparator of digital pll circuit | |
| JPS5547774A (en) | Phase synchronism circuit | |
| JPS5364570A (en) | Phase comparator | |
| JPS5592025A (en) | Synchronizing pulse generation circuit | |
| JPS5620355A (en) | Clock signal forming circuit | |
| JPS52144221A (en) | Ghost delection circuit system | |
| JPS57170688A (en) | Jitter compensation circuit | |
| JPS5564429A (en) | Digital phase comparator | |
| JPS5526471A (en) | Power failure detection circuit | |
| JPS5212868A (en) | Automatic synchronizing signal generating circuit | |
| JPS53128256A (en) | Shortening method for stabilization time of pll circuit | |
| JPS54159818A (en) | Delay circuit | |
| JPS55146618A (en) | Data synchronizing circuit | |
| JPS5588472A (en) | Reset pulse forming circuit | |
| JPS5543987A (en) | Phase comparator | |
| JPS5471929A (en) | Video signal level display method | |
| JPS5665320A (en) | Processor for digital signal | |
| JPS5640384A (en) | Separating circuit of video signal | |
| JPS53110426A (en) | Generator for television synchronizing signal | |
| JPS5479015A (en) | Sampling pulse generating circuit | |
| JPS55114076A (en) | Vertical synchronizer |