JPS5592025A - Synchronizing pulse generation circuit - Google Patents

Synchronizing pulse generation circuit

Info

Publication number
JPS5592025A
JPS5592025A JP16562478A JP16562478A JPS5592025A JP S5592025 A JPS5592025 A JP S5592025A JP 16562478 A JP16562478 A JP 16562478A JP 16562478 A JP16562478 A JP 16562478A JP S5592025 A JPS5592025 A JP S5592025A
Authority
JP
Japan
Prior art keywords
synchronizing
signals
pulse
synchronizing signals
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16562478A
Other languages
Japanese (ja)
Inventor
Yuichi Shiotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16562478A priority Critical patent/JPS5592025A/en
Publication of JPS5592025A publication Critical patent/JPS5592025A/en
Pending legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: To prevent jitter by delaying synchronizing signals only during a time when two or more rises (downs) of clock signals are not included and by extracting one pulse from clock signals.
CONSTITUTION: Synchronizing signals are delayed by D.FF9 only during a time when two or more rises (downs) of clock signals of a repeat frequency higher than synchronizing signals are not included, and synchronizing signals and the output signal from FF9 are applied to NAND gate 10, thereby extracting periodically the first pulse, which is generated after the rise (down) of synchronizing signals, from clock signals. This extracted pulse is outputted as a synchronizing pulse to absorb slippage of the phase of synchronizing signals, namely, slippage of the rise (down) time. Consequently, synchronizing pulses causing no jitter can be obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP16562478A 1978-12-30 1978-12-30 Synchronizing pulse generation circuit Pending JPS5592025A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16562478A JPS5592025A (en) 1978-12-30 1978-12-30 Synchronizing pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16562478A JPS5592025A (en) 1978-12-30 1978-12-30 Synchronizing pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS5592025A true JPS5592025A (en) 1980-07-12

Family

ID=15815892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16562478A Pending JPS5592025A (en) 1978-12-30 1978-12-30 Synchronizing pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS5592025A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047658A (en) * 1990-06-01 1991-09-10 Ncr Corporation High frequency asynchronous data synchronizer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52137242A (en) * 1976-05-12 1977-11-16 Omron Tateisi Electronics Co Pulse signal generator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52137242A (en) * 1976-05-12 1977-11-16 Omron Tateisi Electronics Co Pulse signal generator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047658A (en) * 1990-06-01 1991-09-10 Ncr Corporation High frequency asynchronous data synchronizer

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