JPS5572081A - Input clamping circuit - Google Patents

Input clamping circuit

Info

Publication number
JPS5572081A
JPS5572081A JP14624778A JP14624778A JPS5572081A JP S5572081 A JPS5572081 A JP S5572081A JP 14624778 A JP14624778 A JP 14624778A JP 14624778 A JP14624778 A JP 14624778A JP S5572081 A JPS5572081 A JP S5572081A
Authority
JP
Japan
Prior art keywords
transistor
terminal
input
internal circuits
type diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14624778A
Other languages
Japanese (ja)
Other versions
JPS6146989B2 (en
Inventor
Takumi Miyashita
Koichi Mikome
Joji Murakami
Yoshio Watabe
Takashi Matsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14624778A priority Critical patent/JPS5572081A/en
Publication of JPS5572081A publication Critical patent/JPS5572081A/en
Publication of JPS6146989B2 publication Critical patent/JPS6146989B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/711—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To accomplish sufficient protection of the internal circuits against excessive input level by arranging a static breakdown checking element and an input clamping transistor in a circuit in such a manner that the emitter of the transistor is connected to the input terminal and the internal circuits while the collector thereof to the power source. CONSTITUTION:A clamping circuit is provided with a bonding pad BP, an n<+>- type diffused resistances 11 and 12, a static breakdown checking element 13 composed of a horizontal npn-transistor made up of an n<+>-type diffused region and a p-type semiconductor substrate and the like. It is also provided with a ground 14, a terminal 17 connected to the internal circuits, and an input clamping transistor 18 composed of a horizontal npn transistor made up of an n<+>-type diffused region and a substrate, a power supply terminal 19 and the like. With such an arrangement, the emitter of the transistor 18 is connected to the terminal 17 through a contact section ct while the collector thereof to the terminal 19 through the contact ct. Excessive input, if any, can be clamped while s small number of carrier dhecked from injection to the substrate.
JP14624778A 1978-11-27 1978-11-27 Input clamping circuit Granted JPS5572081A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14624778A JPS5572081A (en) 1978-11-27 1978-11-27 Input clamping circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14624778A JPS5572081A (en) 1978-11-27 1978-11-27 Input clamping circuit

Publications (2)

Publication Number Publication Date
JPS5572081A true JPS5572081A (en) 1980-05-30
JPS6146989B2 JPS6146989B2 (en) 1986-10-16

Family

ID=15403411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14624778A Granted JPS5572081A (en) 1978-11-27 1978-11-27 Input clamping circuit

Country Status (1)

Country Link
JP (1) JPS5572081A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device
US4893159A (en) * 1985-09-25 1990-01-09 Kabushiki Kaisha Toshiba Protected MOS transistor circuit
US4903095A (en) * 1984-12-21 1990-02-20 U.S. Philips Corporation Integrated circuit comprising a device for protection against electrostatic discharge
US5072271A (en) * 1989-09-01 1991-12-10 Kabushiki Kaisha Toshiba Protection circuit for use in semiconductor integrated circuit device
US5684321A (en) * 1994-11-10 1997-11-04 Kabushiki Kaisha Toshiba Semiconductor device having an input protection circuit
US5936282A (en) * 1994-04-13 1999-08-10 Kabushiki Kaisha Toshiba Semiconductor device having input protection circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5233486A (en) * 1975-09-08 1977-03-14 Siemens Ag Circuit for protecting input terminal of mos ic
JPS52127149A (en) * 1976-04-19 1977-10-25 Toshiba Corp Semiconductor circuit
JPS52128081A (en) * 1976-04-21 1977-10-27 Hitachi Ltd Protection circuit for c-mos ic

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5233486A (en) * 1975-09-08 1977-03-14 Siemens Ag Circuit for protecting input terminal of mos ic
JPS52127149A (en) * 1976-04-19 1977-10-25 Toshiba Corp Semiconductor circuit
JPS52128081A (en) * 1976-04-21 1977-10-27 Hitachi Ltd Protection circuit for c-mos ic

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device
US4903095A (en) * 1984-12-21 1990-02-20 U.S. Philips Corporation Integrated circuit comprising a device for protection against electrostatic discharge
US4893159A (en) * 1985-09-25 1990-01-09 Kabushiki Kaisha Toshiba Protected MOS transistor circuit
US5072271A (en) * 1989-09-01 1991-12-10 Kabushiki Kaisha Toshiba Protection circuit for use in semiconductor integrated circuit device
US5936282A (en) * 1994-04-13 1999-08-10 Kabushiki Kaisha Toshiba Semiconductor device having input protection circuit
US5684321A (en) * 1994-11-10 1997-11-04 Kabushiki Kaisha Toshiba Semiconductor device having an input protection circuit

Also Published As

Publication number Publication date
JPS6146989B2 (en) 1986-10-16

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