JPS5574603A - Sequence controller - Google Patents

Sequence controller

Info

Publication number
JPS5574603A
JPS5574603A JP14654678A JP14654678A JPS5574603A JP S5574603 A JPS5574603 A JP S5574603A JP 14654678 A JP14654678 A JP 14654678A JP 14654678 A JP14654678 A JP 14654678A JP S5574603 A JPS5574603 A JP S5574603A
Authority
JP
Japan
Prior art keywords
input
output
information
section
extensive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14654678A
Other languages
Japanese (ja)
Inventor
Kenzo Obitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14654678A priority Critical patent/JPS5574603A/en
Publication of JPS5574603A publication Critical patent/JPS5574603A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control By Computers (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE: To enable to handle the number of points more than input and output number of points without reduction in the operation instructions, by arbitrarily selecting the input and ouput information tables provided one or more with the table selection instruction.
CONSTITUTION: In the input fetch processing, the input section 1 and the input information table 2 are selected with the selection signal s from the selection circuit 8, and the input information of the designated address from the input section 1 is stored in the address corresponding to the table 2. Next, in the extensive input fetch processing, the extension input section 100 and the extensive input information table 200 are selected with the selection signal s2 from the circuit 8 and the information at the input section 100 is stored in the table 200. Further, the sequence instruction stored in the memory section 5 is read out, operation processing is executed, the output information in the output information table 4 is written in the address corresponding to the output section 3, and the output information in the extensive output information in the extensive output information table 400 is written in the extensive output section 300. Thus, the number of points more than the input and output number of points can be handled without the reduction in the operation instruction.
COPYRIGHT: (C)1980,JPO&Japio
JP14654678A 1978-11-29 1978-11-29 Sequence controller Pending JPS5574603A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14654678A JPS5574603A (en) 1978-11-29 1978-11-29 Sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14654678A JPS5574603A (en) 1978-11-29 1978-11-29 Sequence controller

Publications (1)

Publication Number Publication Date
JPS5574603A true JPS5574603A (en) 1980-06-05

Family

ID=15410092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14654678A Pending JPS5574603A (en) 1978-11-29 1978-11-29 Sequence controller

Country Status (1)

Country Link
JP (1) JPS5574603A (en)

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