JPS5578531A - Semiconductor substrate - Google Patents

Semiconductor substrate

Info

Publication number
JPS5578531A
JPS5578531A JP15225678A JP15225678A JPS5578531A JP S5578531 A JPS5578531 A JP S5578531A JP 15225678 A JP15225678 A JP 15225678A JP 15225678 A JP15225678 A JP 15225678A JP S5578531 A JPS5578531 A JP S5578531A
Authority
JP
Japan
Prior art keywords
line
semiconductor substrate
pattern
groove
during heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15225678A
Other languages
Japanese (ja)
Inventor
Masaki Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15225678A priority Critical patent/JPS5578531A/en
Publication of JPS5578531A publication Critical patent/JPS5578531A/en
Pending legal-status Critical Current

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  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To prevent a crystal defect from occurring during heat treating process by forming a stress concentrated line on one face of a semiconductor substrate correspondingly to a scribe line.
CONSTITUTION: A groove 2 (2W20μ deep) is formed as a stress concentrated line on a semiconductor substrate 1 in the pitch same or integer times as great as the pitch of scribe line for a mask pattern of an element to make on the substrate 1. Next, an oxidized film 3 is formed, a resist is fixed on the film 3, and a pattern is again formed by the first mask 4 provided with a pattern capable of masking with the groove 2. By arranging such, a crystal defect to occur during heat treatment can be concentrated in the line, and a dispersion of the element characteristics can thus be reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP15225678A 1978-12-08 1978-12-08 Semiconductor substrate Pending JPS5578531A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15225678A JPS5578531A (en) 1978-12-08 1978-12-08 Semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15225678A JPS5578531A (en) 1978-12-08 1978-12-08 Semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS5578531A true JPS5578531A (en) 1980-06-13

Family

ID=15536497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15225678A Pending JPS5578531A (en) 1978-12-08 1978-12-08 Semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS5578531A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58225418A (en) * 1982-06-23 1983-12-27 Nec Corp Diagnosis controlling system of input and output device
JPS62176159A (en) * 1986-01-29 1987-08-01 Fuji Xerox Co Ltd Manufacture of image sensor
EP1281564A4 (en) * 2000-05-11 2005-10-12 Hiroshi Kamiki Child seat

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58225418A (en) * 1982-06-23 1983-12-27 Nec Corp Diagnosis controlling system of input and output device
JPS62176159A (en) * 1986-01-29 1987-08-01 Fuji Xerox Co Ltd Manufacture of image sensor
EP1281564A4 (en) * 2000-05-11 2005-10-12 Hiroshi Kamiki Child seat

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