JPS5582356A - Pre-fetch control system - Google Patents

Pre-fetch control system

Info

Publication number
JPS5582356A
JPS5582356A JP15418478A JP15418478A JPS5582356A JP S5582356 A JPS5582356 A JP S5582356A JP 15418478 A JP15418478 A JP 15418478A JP 15418478 A JP15418478 A JP 15418478A JP S5582356 A JPS5582356 A JP S5582356A
Authority
JP
Japan
Prior art keywords
register
stored
memory address
instruction word
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15418478A
Other languages
Japanese (ja)
Inventor
Susumu Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15418478A priority Critical patent/JPS5582356A/en
Publication of JPS5582356A publication Critical patent/JPS5582356A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To simplify a store conveyor processing by generating an interrupt to a control storage unit when stove conveyor is generated in a computer adopting pre- fecth control and performing the execution control of this processing by a microprogram.
CONSTITUTION: The program start address is stored in register 12, and the pre- fetched instruction word from a main memory is stored in instruction buffer 11 when the execution of the instruction is started. At this time, the memory address of the last instruction word in buffer 11 is stored in register 12, and further, a correction value dependent upon difference between the memory address of the last instruction word and the executing memory address is stored in register 17. When store conveyor is generated, it is detected whether the object of the instruction word is in buffer 11 or not by comparing addresses of memory address register 10 and register 12 with each other in comparator 13, and interrupt generation circuit 15 is controlled by this comparison result to interrupt control storage unit 16, and the operation of the correction value is performed in operation circuit 18 according to the program of unit 16 and is stored in register 12.
COPYRIGHT: (C)1980,JPO&Japio
JP15418478A 1978-12-15 1978-12-15 Pre-fetch control system Pending JPS5582356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15418478A JPS5582356A (en) 1978-12-15 1978-12-15 Pre-fetch control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15418478A JPS5582356A (en) 1978-12-15 1978-12-15 Pre-fetch control system

Publications (1)

Publication Number Publication Date
JPS5582356A true JPS5582356A (en) 1980-06-21

Family

ID=15578664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15418478A Pending JPS5582356A (en) 1978-12-15 1978-12-15 Pre-fetch control system

Country Status (1)

Country Link
JP (1) JPS5582356A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054048A (en) * 1983-09-02 1985-03-28 Nec Corp Information processing device
JPS6376015A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Instruction fetching system
JPS6376016A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Instruction fetching system
JP2001504957A (en) * 1996-09-26 2001-04-10 トランスメタ・コーポレーション Memory data aliasing method and apparatus in advanced processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054048A (en) * 1983-09-02 1985-03-28 Nec Corp Information processing device
JPS6376015A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Instruction fetching system
JPS6376016A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Instruction fetching system
JP2001504957A (en) * 1996-09-26 2001-04-10 トランスメタ・コーポレーション Memory data aliasing method and apparatus in advanced processor

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