JPS558275A - Device for controlling power semiconductor with control electrode - Google Patents

Device for controlling power semiconductor with control electrode

Info

Publication number
JPS558275A
JPS558275A JP8129478A JP8129478A JPS558275A JP S558275 A JPS558275 A JP S558275A JP 8129478 A JP8129478 A JP 8129478A JP 8129478 A JP8129478 A JP 8129478A JP S558275 A JPS558275 A JP S558275A
Authority
JP
Japan
Prior art keywords
gate
power semiconductor
superimposition
semiconductor
control electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8129478A
Other languages
Japanese (ja)
Inventor
Katsumi Fukazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8129478A priority Critical patent/JPS558275A/en
Publication of JPS558275A publication Critical patent/JPS558275A/en
Pending legal-status Critical Current

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  • Power Conversion In General (AREA)

Abstract

PURPOSE: To prevent superimposition of a control drive current of a power semiconductor by providing an interlock circuit for interlocking the mutual control signals to a signal amplifying amplifier connected to a control electrode circuit.
CONSTITUTION: An interlock circuit IL consisting of three transistors TR11∼ TR13 is added to a gate drive circuit of a power semiconductor such as gate turn-off thyristor GTO or the like. On-gate current flows only when both off-pulse transistor TR5 and bias pulse transistor TR9 are turned off so that the on-gate current in the GTO does not superimpose with the off-gate and bias-gate currents. Even if there occurs a superimposition due to the delay therebetween by means of the different characteristics of photo couplers PC1∼PC3, no superimposition occurs at the final stage to thereby prevent damage of the semiconductor nor erroneous operation of on or off actuation of the semiconductor.
COPYRIGHT: (C)1980,JPO&Japio
JP8129478A 1978-07-04 1978-07-04 Device for controlling power semiconductor with control electrode Pending JPS558275A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8129478A JPS558275A (en) 1978-07-04 1978-07-04 Device for controlling power semiconductor with control electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8129478A JPS558275A (en) 1978-07-04 1978-07-04 Device for controlling power semiconductor with control electrode

Publications (1)

Publication Number Publication Date
JPS558275A true JPS558275A (en) 1980-01-21

Family

ID=13742354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8129478A Pending JPS558275A (en) 1978-07-04 1978-07-04 Device for controlling power semiconductor with control electrode

Country Status (1)

Country Link
JP (1) JPS558275A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103966A (en) * 1980-01-23 1981-08-19 Toshiba Corp Gate control circuit for gate turn off thyrister

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103966A (en) * 1980-01-23 1981-08-19 Toshiba Corp Gate control circuit for gate turn off thyrister

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