JPS558617A - Storage system - Google Patents

Storage system

Info

Publication number
JPS558617A
JPS558617A JP7915978A JP7915978A JPS558617A JP S558617 A JPS558617 A JP S558617A JP 7915978 A JP7915978 A JP 7915978A JP 7915978 A JP7915978 A JP 7915978A JP S558617 A JPS558617 A JP S558617A
Authority
JP
Japan
Prior art keywords
data
register
address
error
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7915978A
Other languages
Japanese (ja)
Inventor
Takashi Aoki
Osamu Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7915978A priority Critical patent/JPS558617A/en
Publication of JPS558617A publication Critical patent/JPS558617A/en
Pending legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To make it possible to check errors including an address position error at a store time, at a read time by generating an error check code under the state where address information is included.
CONSTITUTION: When data is stored in storage device 1, data is set to register 3, and address information and store data are supplied to error correction code generation circuit part 5, and error correction code ECC is set to register 3. When data is read out from storage device 1, read information is set to address register 2, and data with the error correction code is set to read data register 4 from the address which is indicated by contents of register 2. At this time, contents of register 4 and address information are supplied to error check and data correction circuit part 6, and error check is performed; and in case of an error in address information, read data from the erroneous address is prevented from being transferred to the processing unit side.
COPYRIGHT: (C)1980,JPO&Japio
JP7915978A 1978-06-29 1978-06-29 Storage system Pending JPS558617A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7915978A JPS558617A (en) 1978-06-29 1978-06-29 Storage system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7915978A JPS558617A (en) 1978-06-29 1978-06-29 Storage system

Publications (1)

Publication Number Publication Date
JPS558617A true JPS558617A (en) 1980-01-22

Family

ID=13682168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7915978A Pending JPS558617A (en) 1978-06-29 1978-06-29 Storage system

Country Status (1)

Country Link
JP (1) JPS558617A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185686U (en) * 1984-05-21 1985-12-09 護摩堂　世都子 goho race
JPH02206887A (en) * 1989-02-06 1990-08-16 Fuji Xerox Co Ltd Data input converting device
EP1715424A2 (en) 2005-03-31 2006-10-25 Fujitsu Limited Storage control circuit and method to detect addressing errors in the storage control circuit
JP2016170679A (en) * 2015-03-13 2016-09-23 株式会社デンソー Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185686U (en) * 1984-05-21 1985-12-09 護摩堂　世都子 goho race
JPH02206887A (en) * 1989-02-06 1990-08-16 Fuji Xerox Co Ltd Data input converting device
EP1715424A2 (en) 2005-03-31 2006-10-25 Fujitsu Limited Storage control circuit and method to detect addressing errors in the storage control circuit
US7555699B2 (en) 2005-03-31 2009-06-30 Fujitsu Limited Storage control circuit, and method for address error check in the storage control circuit
JP2016170679A (en) * 2015-03-13 2016-09-23 株式会社デンソー Semiconductor device

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