JPS5589985A - Semiconductor memory unit - Google Patents
Semiconductor memory unitInfo
- Publication number
- JPS5589985A JPS5589985A JP16487278A JP16487278A JPS5589985A JP S5589985 A JPS5589985 A JP S5589985A JP 16487278 A JP16487278 A JP 16487278A JP 16487278 A JP16487278 A JP 16487278A JP S5589985 A JPS5589985 A JP S5589985A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- output
- address
- circuit
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
Landscapes
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To enable to commonly use the same terminal for the address and data information terminals, with high impedance data output circuit when address information is written in. CONSTITUTION:The terminal T is connected to the input terminal of the address inverter circuit 10 and the output terminal of the data outut circuit 11, and the terminal S is constituted so that the first strobe signal S can be inputted. Assuming that the signal S is at ''0'' before the time t0 and at ''1'' for the time t0-t2. While this, the input level of the terminal T is fed to the address inverter circuit 10, the signals AD, AD' are inputted to the output address latch circuit 13, and the information corresponding to AD, AD' is kept after the latch time t2. If RD, RD' are assured after the time t1, the signal S is taken as the logic ''0'', the output of the data output circuit 11 is taken from high to low impedance state, allowing the readout data to output to the terminal T. Thus, the same terminal T can commonly be used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16487278A JPS5589985A (en) | 1978-12-27 | 1978-12-27 | Semiconductor memory unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16487278A JPS5589985A (en) | 1978-12-27 | 1978-12-27 | Semiconductor memory unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5589985A true JPS5589985A (en) | 1980-07-08 |
Family
ID=15801521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16487278A Pending JPS5589985A (en) | 1978-12-27 | 1978-12-27 | Semiconductor memory unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5589985A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62177695A (en) * | 1986-01-31 | 1987-08-04 | Toshiba Corp | memory card |
| JPH07296593A (en) * | 1994-04-28 | 1995-11-10 | Mega Chips:Kk | Semiconductor storage device |
| US8098531B2 (en) | 2006-10-31 | 2012-01-17 | Fujitsu Semiconductor Limited | Semiconductor memory device |
-
1978
- 1978-12-27 JP JP16487278A patent/JPS5589985A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62177695A (en) * | 1986-01-31 | 1987-08-04 | Toshiba Corp | memory card |
| JPH07296593A (en) * | 1994-04-28 | 1995-11-10 | Mega Chips:Kk | Semiconductor storage device |
| US8098531B2 (en) | 2006-10-31 | 2012-01-17 | Fujitsu Semiconductor Limited | Semiconductor memory device |
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