JPS5591171A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5591171A
JPS5591171A JP16304778A JP16304778A JPS5591171A JP S5591171 A JPS5591171 A JP S5591171A JP 16304778 A JP16304778 A JP 16304778A JP 16304778 A JP16304778 A JP 16304778A JP S5591171 A JPS5591171 A JP S5591171A
Authority
JP
Japan
Prior art keywords
substrate
volts
region
input signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16304778A
Other languages
Japanese (ja)
Other versions
JPS6151431B2 (en
Inventor
Kazuhiro Shimotori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16304778A priority Critical patent/JPS5591171A/en
Publication of JPS5591171A publication Critical patent/JPS5591171A/en
Publication of JPS6151431B2 publication Critical patent/JPS6151431B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/711—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent occurrence of carrier injection to a substrate when an input signal is reverse voltage even if the substrate is grounded by employing a vertical pnp-junction structure formed in an integrated circuit (IC) substrate for an input protecting circuit. CONSTITUTION:A p<->-type emitter region 20 and an n-type base region 19 are sequentially formed in a p-type collector layer 1. The region 20 is connected at 9 to the gate 6 of a MOSFET 7. A signal is applied through resistance of the region 20 from a terminal 8, and clamp voltage is applied from a terminal 22. The base region 19 is now applied with 5 volts thereto, and the collector 1 is grounded. When the input signal is lower than 5 volts, the regions 20, 19 are reversely biased, and electron is not accordingly injected into the substrate 1. When the input signal exceeds 5 volts, the transistor 21 is conducted to thus protect the input. At this time holes which are not recoupled are accelerated by the 5 volts to flow into the substrate 1. When the area of the base region 19 is increased to reduce the resistance between the base region and the substrate to the ignorable degree, positive voltage is not produced at the substrate 2. Thus, the input signal is clamped at the base potential and any higher voltage is not applied to the gate 6, thus the original input is protected without error.
JP16304778A 1978-12-28 1978-12-28 Semiconductor integrated circuit device Granted JPS5591171A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16304778A JPS5591171A (en) 1978-12-28 1978-12-28 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16304778A JPS5591171A (en) 1978-12-28 1978-12-28 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5591171A true JPS5591171A (en) 1980-07-10
JPS6151431B2 JPS6151431B2 (en) 1986-11-08

Family

ID=15766161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16304778A Granted JPS5591171A (en) 1978-12-28 1978-12-28 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5591171A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772376A (en) * 1980-10-24 1982-05-06 Hitachi Ltd Protective circuit device for semiconductor
US4757363A (en) * 1984-09-14 1988-07-12 Harris Corporation ESD protection network for IGFET circuits with SCR prevention guard rings
JPH0239570A (en) * 1988-07-29 1990-02-08 Toshiba Corp Input protecting circuit
US4916085A (en) * 1986-12-17 1990-04-10 Sgs Microelettronica S.P.A. MOS power structure with protective device against overvoltages and manufacturing process therefor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772376A (en) * 1980-10-24 1982-05-06 Hitachi Ltd Protective circuit device for semiconductor
US4757363A (en) * 1984-09-14 1988-07-12 Harris Corporation ESD protection network for IGFET circuits with SCR prevention guard rings
US4916085A (en) * 1986-12-17 1990-04-10 Sgs Microelettronica S.P.A. MOS power structure with protective device against overvoltages and manufacturing process therefor
JPH0239570A (en) * 1988-07-29 1990-02-08 Toshiba Corp Input protecting circuit

Also Published As

Publication number Publication date
JPS6151431B2 (en) 1986-11-08

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