JPS5593082A - Timer with two-stage clock operation mode - Google Patents

Timer with two-stage clock operation mode

Info

Publication number
JPS5593082A
JPS5593082A JP16580878A JP16580878A JPS5593082A JP S5593082 A JPS5593082 A JP S5593082A JP 16580878 A JP16580878 A JP 16580878A JP 16580878 A JP16580878 A JP 16580878A JP S5593082 A JPS5593082 A JP S5593082A
Authority
JP
Japan
Prior art keywords
gate
counter
msb
clock
count
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16580878A
Other languages
Japanese (ja)
Other versions
JPS6150269B2 (en
Inventor
Hitoshi Takahashi
Joji Murakami
Katsumi Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16580878A priority Critical patent/JPS5593082A/en
Publication of JPS5593082A publication Critical patent/JPS5593082A/en
Publication of JPS6150269B2 publication Critical patent/JPS6150269B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Measurement Of Predetermined Time Intervals (AREA)
  • Electrical Control Of Ignition Timing (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE: To provide two-stage clock operation by clocks with different long and short periods, by providing a fixed gate method.
CONSTITUTION: Externally-supplied data of 18 bits, for example, is passed through data bus 11; 8-bit data of it is set to MSB latch 14 via MSB buffer register 12, and the other 8-bit data to LSB latch 15 at the same time. In this state, AND gate 16 is closed, and consequently although MSB counter 14 can not count, AND gate 19 is opened by the output of NOR gate 15 via inverter 18, so that LSE counter 13 will count down by clock C1. Once the content of counter 13 reaches zero, gate 19 is closed to stop the count operation, by counter 14 starts counting clock G1 to the contrary and keeps on counting until its content reaches zero. This operation is repeated to provided two-stage operation by two kinds of clocks.
COPYRIGHT: (C)1980,JPO&Japio
JP16580878A 1978-12-30 1978-12-30 Timer with two-stage clock operation mode Granted JPS5593082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16580878A JPS5593082A (en) 1978-12-30 1978-12-30 Timer with two-stage clock operation mode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16580878A JPS5593082A (en) 1978-12-30 1978-12-30 Timer with two-stage clock operation mode

Publications (2)

Publication Number Publication Date
JPS5593082A true JPS5593082A (en) 1980-07-15
JPS6150269B2 JPS6150269B2 (en) 1986-11-04

Family

ID=15819381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16580878A Granted JPS5593082A (en) 1978-12-30 1978-12-30 Timer with two-stage clock operation mode

Country Status (1)

Country Link
JP (1) JPS5593082A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5265070A (en) * 1989-11-08 1993-11-23 Seiko Epson Corporation Receiving device with timekeeping function

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5124866A (en) * 1974-08-23 1976-02-28 Tokyo Shibaura Electric Co

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5124866A (en) * 1974-08-23 1976-02-28 Tokyo Shibaura Electric Co

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5265070A (en) * 1989-11-08 1993-11-23 Seiko Epson Corporation Receiving device with timekeeping function

Also Published As

Publication number Publication date
JPS6150269B2 (en) 1986-11-04

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