JPS5593348A - Clock reproduction unit - Google Patents

Clock reproduction unit

Info

Publication number
JPS5593348A
JPS5593348A JP142879A JP142879A JPS5593348A JP S5593348 A JPS5593348 A JP S5593348A JP 142879 A JP142879 A JP 142879A JP 142879 A JP142879 A JP 142879A JP S5593348 A JPS5593348 A JP S5593348A
Authority
JP
Japan
Prior art keywords
clock
mixers
reproduction
phase
cosomegat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP142879A
Other languages
Japanese (ja)
Inventor
Makoto Miyake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP142879A priority Critical patent/JPS5593348A/en
Publication of JPS5593348A publication Critical patent/JPS5593348A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0274—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit with Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To supply stable clock to the signal processing section, by performing phase synchronism between the clock picked up from the reception signal and stable clock provided in the communication system, in the digital communication such as time sharing multiplex connection. CONSTITUTION:The clock piked up at the clock reproduction circuit 2 from the reception signal from the terminal 1 is synthesized in the synthesis circuit 11 through the two processes consisting of the phase detectors 5a, 5b, low pass filters 8a, 8b, sample hold circuits 9a, 9b and mixers 6a, 6b respectively. On the other hand, the reference clock input 4 is fed to the phase detectors 5a, 5b and mixers 6a, 6b constituting the said two processes with the phase of 90 deg.. Taking the reproduction clock as Cos(omegat+theta) and reference clock as Cosomegat, the output of the mixers 6a, 6b is -Costheta.Cosomegat+Sintheta Sinomegat and the synthesized output is Cos(omegat+theta). Further, if the input is present at the control terminal 10, the sample hold circuits 9a, 9b store the synchronizing state and the clock can be assured even with the absence of reproduction clock.
JP142879A 1979-01-08 1979-01-08 Clock reproduction unit Pending JPS5593348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP142879A JPS5593348A (en) 1979-01-08 1979-01-08 Clock reproduction unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP142879A JPS5593348A (en) 1979-01-08 1979-01-08 Clock reproduction unit

Publications (1)

Publication Number Publication Date
JPS5593348A true JPS5593348A (en) 1980-07-15

Family

ID=11501178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP142879A Pending JPS5593348A (en) 1979-01-08 1979-01-08 Clock reproduction unit

Country Status (1)

Country Link
JP (1) JPS5593348A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012085142A (en) * 2010-10-13 2012-04-26 Fujitsu Ltd Clock regeneration circuit and clock data regeneration circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012085142A (en) * 2010-10-13 2012-04-26 Fujitsu Ltd Clock regeneration circuit and clock data regeneration circuit

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