JPS5596675A - Semiconductor device - Google Patents

Abstract

PURPOSE: To restrict the length of a depletion layer extended from a substrate to a base region in a semiconductor device and increase the pinch-off voltage thereof by providing a region having the same conductivity type as the base region and higher impurity density than the base region in the base region directly under the collector region for a lateral transistor.

CONSTITUTION: An n-type layer 13 to become a base region is epitaxially grown on a p-tgype silicon substrate 11, and a p⁺-type region 14 reaching the substrate 11 is diffused to thereby insulate and isolate the layer 13 in an island state. Then, a p-type emitter region 18 is diffused in the layer 13 thus isolated, and surrounded by a p-type collector region 16. Thereafter, an n⁺-type base electrode pickup region is provided at the layer 13, the entire surface is coated with SiO₂ film 15, openings are then perforated to thereby form electrodes at the regions as a lateral transistor. In this configuration an n-type region 12 is added at the bottom in the n-type base layer 13 directly under the p-type collector region 16. Thus, a depletion layer extended from the substrate 11 to the region 16 is restricted, its pinch-off voltage is increased to thereby enhance the operating voltage.

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