JPS5596680A - Method of fabricating mos semiconductor device - Google Patents

Method of fabricating mos semiconductor device

Info

Publication number
JPS5596680A
JPS5596680A JP389579A JP389579A JPS5596680A JP S5596680 A JPS5596680 A JP S5596680A JP 389579 A JP389579 A JP 389579A JP 389579 A JP389579 A JP 389579A JP S5596680 A JPS5596680 A JP S5596680A
Authority
JP
Japan
Prior art keywords
film
sio
gate
mask
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP389579A
Other languages
Japanese (ja)
Inventor
Shokichi Yoshitome
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP389579A priority Critical patent/JPS5596680A/en
Publication of JPS5596680A publication Critical patent/JPS5596680A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To obtain an electrode with desired with for a MOS semiconductor device by forming SiO2 corresponding to the gate length at the polycrystal silicon film forming a laminated film when forming a gate electrode through a gate oxide film on a semiconductor substrate and using the film for a mask.
CONSTITUTION: A thick field SiO2 film 2 is coated on the end of a semiconductor substrate 1, and a thin gate SiO2 film 3 is coated on the substrate 1 as surrounded with the film 2. Polycrystal silicon film 4, Si3N4 film 5, polycrystal silicon film 6, and Si3N4 film 7 are sequentially laminated on the entire surface. Then, the films 7, 6 of one side of the source and drain regions are removed, heat treated in humidified oxygen atmosphere, and the film 6 is oxidized from the exposed end surface to thereby obtain SiO2 film 8 having the length corresponding to the gate length. Then, both the films 7 and 6 are removed, with residued film 8 as a mask the film 5 is etched and removed, and the film 5 thus further residued is as a mask to be heat treated in humidified oxygen atmosphere. Thus, the exposed portion of the film 4 is converted to SiO2 film 41, and the film 41 is then etched and removed. Thereafter, the film 5 is removed to thereby expose the polycrystal gate electrode 4 under the film 5.
COPYRIGHT: (C)1980,JPO&Japio
JP389579A 1979-01-19 1979-01-19 Method of fabricating mos semiconductor device Pending JPS5596680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP389579A JPS5596680A (en) 1979-01-19 1979-01-19 Method of fabricating mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP389579A JPS5596680A (en) 1979-01-19 1979-01-19 Method of fabricating mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS5596680A true JPS5596680A (en) 1980-07-23

Family

ID=11569912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP389579A Pending JPS5596680A (en) 1979-01-19 1979-01-19 Method of fabricating mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5596680A (en)

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