JPS56143048A - Analog input device - Google Patents

Analog input device

Info

Publication number
JPS56143048A
JPS56143048A JP4610480A JP4610480A JPS56143048A JP S56143048 A JPS56143048 A JP S56143048A JP 4610480 A JP4610480 A JP 4610480A JP 4610480 A JP4610480 A JP 4610480A JP S56143048 A JPS56143048 A JP S56143048A
Authority
JP
Japan
Prior art keywords
memory
analog input
code
section
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4610480A
Other languages
Japanese (ja)
Inventor
Masayuki Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4610480A priority Critical patent/JPS56143048A/en
Publication of JPS56143048A publication Critical patent/JPS56143048A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To simplify the hardware and to reduce the cost, by storing the digital signal obtained at the input section to the address area of the main memory section to be selected, in the input device of DMA system handling a lot of analog input signals. CONSTITUTION:The analog input signal (ans) in sampling hold at the sampling hold circuit 110 of analog input sections 1011-1012 is added with the code SC in 2 bits which is specific in itself at the analog input controller 112, and it is transferred to the DMA interface section 103 according to the priority. One memory address MA is selectively output according to the code SC and fed to the memory 105 via the interface, and the data stored in the input data register is transferred to the memory 105 and stored in the memory area designated with the code SC specific to the memory 105. Thus, the transfer of memory address is made unnecessary, allowing to avoid the lowering of transfer speed.
JP4610480A 1980-04-08 1980-04-08 Analog input device Pending JPS56143048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4610480A JPS56143048A (en) 1980-04-08 1980-04-08 Analog input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4610480A JPS56143048A (en) 1980-04-08 1980-04-08 Analog input device

Publications (1)

Publication Number Publication Date
JPS56143048A true JPS56143048A (en) 1981-11-07

Family

ID=12737681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4610480A Pending JPS56143048A (en) 1980-04-08 1980-04-08 Analog input device

Country Status (1)

Country Link
JP (1) JPS56143048A (en)

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