JPS6479848A - Data processor - Google Patents

Data processor

Info

Publication number
JPS6479848A
JPS6479848A JP62237808A JP23780887A JPS6479848A JP S6479848 A JPS6479848 A JP S6479848A JP 62237808 A JP62237808 A JP 62237808A JP 23780887 A JP23780887 A JP 23780887A JP S6479848 A JPS6479848 A JP S6479848A
Authority
JP
Japan
Prior art keywords
data
buffer
receiving
receiving buffer
transferring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62237808A
Other languages
Japanese (ja)
Inventor
Takanori Tsuji
Yoshinori Ejima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62237808A priority Critical patent/JPS6479848A/en
Publication of JPS6479848A publication Critical patent/JPS6479848A/en
Pending legal-status Critical Current

Links

Landscapes

  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To reduce processing for transferring data to a main receiving buffer by temporarily storing data in a sub-receiving buffer until the data are collected to a certain quantity and then collectively transferring the data to the main receiving buffer. CONSTITUTION:The sub-receiving buffer 6 to be accessed only by a 1st control means 3 for receiving a data signal is provided and receiving data are temporarily stored in the buffer 6 and then transferred to the receiving buffer 4. In case of transferring data from the buffer 6 to the buffer 4, the number of bits of the data to be transferred is previously known and transfer processing can be collectively executed. Thereby, a time required for transferring data to the receiving buffer 4 can be shortened. Consequently, a time required for occupying the 1st control device 3 with data transfer can be shortened and no trouble is generated in other control.
JP62237808A 1987-09-22 1987-09-22 Data processor Pending JPS6479848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62237808A JPS6479848A (en) 1987-09-22 1987-09-22 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62237808A JPS6479848A (en) 1987-09-22 1987-09-22 Data processor

Publications (1)

Publication Number Publication Date
JPS6479848A true JPS6479848A (en) 1989-03-24

Family

ID=17020713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62237808A Pending JPS6479848A (en) 1987-09-22 1987-09-22 Data processor

Country Status (1)

Country Link
JP (1) JPS6479848A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464148A (en) * 1990-07-03 1992-02-28 Nec Corp Data transferring method for electronic failing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464148A (en) * 1990-07-03 1992-02-28 Nec Corp Data transferring method for electronic failing system

Similar Documents

Publication Publication Date Title
JPS6455668A (en) Interface mechanism
JPS55129847A (en) Access system of memory unit
CA2065894A1 (en) Data transfer system
CA2046720A1 (en) Nonsynchronous channel/dasd communication system
JPS6479848A (en) Data processor
JPS6437640A (en) Control system for cache memory
JPS56143583A (en) Buffer memory control system
JPS5489434A (en) Memory access control processing system
JPS6473458A (en) System for controlling access of vector data
JPS56143048A (en) Analog input device
JPS5759233A (en) Signal transmitting circuit
JPS6468848A (en) Data logging system in controller provided with dma control function
JPS5533282A (en) Buffer control system
JPS5657165A (en) Data gathering device
JPS5442937A (en) Data input system
JPS6466764A (en) Adaptor control system
JPS643706A (en) Controller
JPS56149626A (en) Channel device
JPS6454562A (en) Data transfer control system
JPS6459441A (en) Cash system
JPS5412234A (en) Control system for buffer registor
JPS5610753A (en) Buffer control system
JPS5712469A (en) Buffer memory control system
JPS5478040A (en) Communication controller
JPS5760434A (en) Data transfer controlling system