JPS5621303B2 - - Google Patents
Info
- Publication number
- JPS5621303B2 JPS5621303B2 JP4754975A JP4754975A JPS5621303B2 JP S5621303 B2 JPS5621303 B2 JP S5621303B2 JP 4754975 A JP4754975 A JP 4754975A JP 4754975 A JP4754975 A JP 4754975A JP S5621303 B2 JPS5621303 B2 JP S5621303B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00195—Layout of the delay element using FET's
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50047549A JPS51123048A (en) | 1975-04-21 | 1975-04-21 | Delay circuit having the transfer gate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50047549A JPS51123048A (en) | 1975-04-21 | 1975-04-21 | Delay circuit having the transfer gate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS51123048A JPS51123048A (en) | 1976-10-27 |
| JPS5621303B2 true JPS5621303B2 (mo) | 1981-05-19 |
Family
ID=12778223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50047549A Granted JPS51123048A (en) | 1975-04-21 | 1975-04-21 | Delay circuit having the transfer gate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS51123048A (mo) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56120209A (en) * | 1980-02-27 | 1981-09-21 | Fujitsu Ltd | Delay circuit |
| JPH0612623B2 (ja) * | 1983-09-28 | 1994-02-16 | 株式会社東芝 | 半導体装置 |
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1975
- 1975-04-21 JP JP50047549A patent/JPS51123048A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS51123048A (en) | 1976-10-27 |