JPS5633748A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5633748A
JPS5633748A JP10816279A JP10816279A JPS5633748A JP S5633748 A JPS5633748 A JP S5633748A JP 10816279 A JP10816279 A JP 10816279A JP 10816279 A JP10816279 A JP 10816279A JP S5633748 A JPS5633748 A JP S5633748A
Authority
JP
Japan
Prior art keywords
data
searching
cpu1
reading
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10816279A
Other languages
Japanese (ja)
Inventor
Haruhiko Tomono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10816279A priority Critical patent/JPS5633748A/en
Publication of JPS5633748A publication Critical patent/JPS5633748A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

PURPOSE: To realize a high-speed processing as well as a designation of the type of data searching through the program, by reading the data out of the table of the data to be searched via the direct memory access control unit and carrying out the most searching of the data through the hardware.
CONSTITUTION: The CPU1 reads the searching data out of the memory 2 by the instruction of its own and then set it to the registers 4 and 5. Then the CPU1 starts reading the data in the table of the data to be searched within the memory 2 and then sets the address and the frequency to the direct memory access DMA control unit 3. After this the CPU1 sets the FF6, and sends the DMA request signal to the unit 3 via the output of the FF6. Receiving this signal, the unit 3 transmits the holding signal to discontinue the operation of the CPU1. In such way, the searching for the reading data is carried out substantially through the hardware to increase the processing velocity, at the same time securing the designation through the program for the type of the data searching.
COPYRIGHT: (C)1981,JPO&Japio
JP10816279A 1979-08-27 1979-08-27 Data processor Pending JPS5633748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10816279A JPS5633748A (en) 1979-08-27 1979-08-27 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10816279A JPS5633748A (en) 1979-08-27 1979-08-27 Data processor

Publications (1)

Publication Number Publication Date
JPS5633748A true JPS5633748A (en) 1981-04-04

Family

ID=14477529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10816279A Pending JPS5633748A (en) 1979-08-27 1979-08-27 Data processor

Country Status (1)

Country Link
JP (1) JPS5633748A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943429A (en) * 1982-09-03 1984-03-10 Hitachi Ltd Input/output control method
JPH0313542U (en) * 1989-06-19 1991-02-12
JPH04123160A (en) * 1990-09-13 1992-04-23 Nec Corp Receiving data processing system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943429A (en) * 1982-09-03 1984-03-10 Hitachi Ltd Input/output control method
JPH0313542U (en) * 1989-06-19 1991-02-12
JPH04123160A (en) * 1990-09-13 1992-04-23 Nec Corp Receiving data processing system

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